Ð þíõ8€(uHaltr,socfpga-stratix10 &SoCFPGA Stratix 10 SoCDKcpus cpu@0arm,cortex-a53arm,armv8,cpu8psciFJPcpu@1arm,cortex-a53arm,armv8,cpu8psciFJPcpu@2arm,cortex-a53arm,armv8,cpu8psciFJPcpu@3arm,cortex-a53arm,armv8,cpu8psciFJPpmuarm,armv8-pmuv30Xª«¬­cpsci arm,psci-0.2?smcintc@fffc1000arm,gic-400arm,cortex-a15-gicv‡0Fÿüÿü ÿü@ ÿü` JPsoc  simple-bus,socœ­ÿÿÿÿclkmgr@ffd1000 altr,clk-mgrFÿÑethernet@ff8000000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacFÿ€  XZ´macirqÄ Ðdisabledethernet@ff8020000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacFÿ€  X[´macirqÄ Ðdisabledethernet@ff8040000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacFÿ€@  X\´macirqÄ Ðdisabledgpio@ffc03200 snps,dw-apb-gpioFÿÀ2 Ðdisabledgpio-controller@0snps,dw-apb-gpio-port×çóF‡v Xngpio@ffc03300 snps,dw-apb-gpioFÿÀ3 Ðdisabledgpio-controller@0snps,dw-apb-gpio-port×çóF‡v Xni2c@ffc02800 snps,designware-i2cFÿÀ( Xg Ðdisabledi2c@ffc02900 snps,designware-i2cFÿÀ) Xh Ðdisabledi2c@ffc02a00 snps,designware-i2cFÿÀ* Xi Ðdisabledi2c@ffc02b00 snps,designware-i2cFÿÀ+ Xj Ðdisabledi2c@ffc02c00 snps,designware-i2cFÿÀ, Xk Ðdisableddwmmc0@ff808000 altr,socfpga-dw-mshcFÿ€€ X` Ðdisabledsram@ffe00000 mmio-sramFÿàrstmgr@ffd11000  altr,rst-mgrFÿÑspi@ffda4000snps,dw-apb-ssi FÿÚ@ Xe( Ðdisabledspi@ffda5000snps,dw-apb-ssi FÿÚP Xf( Ðdisabledsysmgr@ffd12000altr,sys-mgrsysconFÿÑ (timerarm,armv8-timer0X   timer0@ffc03000snps,dw-apb-timer XqFÿÀ0timer1@ffc03100snps,dw-apb-timer XrFÿÀ1timer2@ffd00000snps,dw-apb-timer XsFÿÐtimer3@ffd00100snps,dw-apb-timer XtFÿÐserial0@ffc02000snps,dw-apb-uartFÿÀ  Xl0:Ðokayserial1@ffc02100snps,dw-apb-uartFÿÀ! Xm0: Ðdisabledusbphy@0Gusb-nop-xceivÐokayJPusb@ffb00000 snps,dwc2Fÿ° X]R Wusb2-phy Ðdisabledusb@ffb40000 snps,dwc2Fÿ´ X^R Wusb2-phy Ðdisabledwatchdog@ffd00200 snps,dw-wdtFÿÐ Xu Ðdisabledwatchdog@ffd00300 snps,dw-wdtFÿÐ Xv Ðdisabledwatchdog@ffd00400 snps,dw-wdtFÿÐ X} Ðdisabledwatchdog@ffd00500 snps,dw-wdtFÿÐ X~ Ðdisabledaliasesa/soc/serial0@ffc02000choseniserial0:115200n8memory,memoryF compatible#address-cells#size-cellsmodeldevice_typeenable-methodreglinux,phandleinterruptsinterrupt-affinity#interrupt-cellsinterrupt-controllerinterrupt-parentrangesinterrupt-namesmac-addressstatusgpio-controller#gpio-cellssnps,nr-gpiosfifo-depth#reset-cellsnum-chipselectbus-numreg-shiftreg-io-width#phy-cellsphysphy-namesserial0stdout-path