Ð þíž8\(B$ ",sprd,sc9836-openphonesprd,sc9836"7Spreadtrum SC9836 Openphone Boardsoc ,simple-bus =ap-apb ,simple-bus =serial@70000000,sprd,sc9836-uartDp HSZokayserial@70100000,sprd,sc9836-uartDp HSZokayserial@70200000,sprd,sc9836-uartDp  HSZokayserial@70300000,sprd,sc9836-uartDp0 HSZokayclk26mhz ,fixed-clockanŒº€~cpus cpu@0†cpu,arm,cortex-a53arm,armv8D’psci~ cpu@1†cpu,arm,cortex-a53arm,armv8D’psci~ cpu@2†cpu,arm,cortex-a53arm,armv8D’psci~cpu@3†cpu,arm,cortex-a53arm,armv8D’psci~etf@10003000 ,arm,coresight-tmcarm,primecellD0S  apb_pclkportendpoint¬·~funnel@10001000#,arm,coresight-funnelarm,primecellDS  apb_pclkports port@0Dendpoint·~port@1Dendpoint¬·~ port@2Dendpoint¬·~ port@3Dendpoint¬·~port@4Dendpoint¬·~port@5Dendpoint¬· ~etm@10440000",arm,coresight-etm4xarm,primecellDDÇ S  apb_pclkportendpoint· ~etm@10540000",arm,coresight-etm4xarm,primecellDTÇ S  apb_pclkportendpoint· ~etm@10640000",arm,coresight-etm4xarm,primecellDdÇS  apb_pclkportendpoint·~etm@10740000",arm,coresight-etm4xarm,primecellDtÇS  apb_pclkportendpoint·~stm@10006000 ,arm,coresight-stmarm,primecell D`Ëstm-basestm-stimulus-baseS  apb_pclkportendpoint·~ interrupt-controller@12001000 ,arm,gic-400@D @ ` Õæ H ~psci ,arm,psci™smcûÄ„ Ätimer,arm,armv8-timer0H   aliases/soc/ap-apb/serial@70000000/soc/ap-apb/serial@70100000&/soc/ap-apb/serial@70200000./soc/ap-apb/serial@70300000memory@80000000†memoryD€ chosen6serial1:115200n8 interrupt-parent#address-cells#size-cellscompatiblemodelrangesreginterruptsclocksstatus#clock-cellsclock-frequencyphandledevice_typeenable-methodclock-namesslave-moderemote-endpointcpureg-names#interrupt-cellsinterrupt-controllercpu_oncpu_offcpu_suspendserial0serial1serial2serial3stdout-path