8 ( %ucrobotics,bubblegum-96actions,s900 + 7Bubblegum-96cpus+cpu@0=cpuarm,cortex-a53arm,armv8IMpsci[cpu@1=cpuarm,cortex-a53arm,armv8IMpsci[cpu@2=cpuarm,cortex-a53arm,armv8IMpsci[cpu@3=cpuarm,cortex-a53arm,armv8IMpsci[reserved-memory+csecmon@1f000000Ijpsci arm,psci-0.2Tsmcarm-pmuarm,cortex-a53-pmu0q|timerarm,armv8-timer0q   hosc fixed-clockn6[soc simple-bus+cinterrupt-controller@e00f1000 arm,gic-400@I @ `  q [serial@e0120000#actions,s900-uartactions,owl-uartI  q disabledserial@e0122000#actions,s900-uartactions,owl-uartI  q disabledserial@e0124000#actions,s900-uartactions,owl-uartI@  q disabledserial@e0126000#actions,s900-uartactions,owl-uartI`  q  disabledserial@e0128000#actions,s900-uartactions,owl-uartI  q! disabledserial@e012a000#actions,s900-uartactions,owl-uartI  q"okayserial@e012c000#actions,s900-uartactions,owl-uartI  q# disabledtimer@e0228000actions,s900-timerI" q timer1aliases/soc/serial@e012a000chosenserial5:115200n8memory@0=memoryIuart5-clk fixed-clock[ compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodphandlerangesno-mapinterruptsinterrupt-affinityclock-frequency#clock-cellsinterrupt-controller#interrupt-cellsstatusclocksinterrupt-namesserial5stdout-path