8 (Z $mediatek,mt2712-evbmediatek,mt2712 +!7MediaTek MT2712 evaluation boardcpus+cpu-mapcluster0core0=core1=cluster1core0=cpu@0Acpuarm,cortex-a35MQacpu@1Acpuarm,cortex-a35MipsciQacpu@200Acpuarm,cortex-a72MipsciQaidle-states warm,pscicpu-sleep-0arm,idle-statedPacluster-sleep-0arm,idle-state^P apsci arm,psci-0.2psmcdummy26m fixed-clockadummyclk fixed-clocka timerarm,armv8-timer 0   serial@1000f000*mediatek,mt2712-uartmediatek,mt6577-uartM    baudbus disabledinterrupt-controller@10220a80.mediatek,mt2712-sysirqmediatek,mt6577-sysirq 5 M" @ainterrupt-controller@10510000 arm,gic-4005  @MQRTV  aserial@11002000*mediatek,mt2712-uartmediatek,mt6577-uartM  [   baudbusokayserial@11003000*mediatek,mt2712-uartmediatek,mt6577-uartM0 \   baudbus disabledserial@11004000*mediatek,mt2712-uartmediatek,mt6577-uartM@ ]   baudbus disabledserial@11005000*mediatek,mt2712-uartmediatek,mt6577-uartMP ^   baudbus disabledserial@11019000*mediatek,mt2712-uartmediatek,mt6577-uartM ~   baudbus disabledaliasesF/serial@11002000memory@40000000AmemoryM@chosenNserial0:921600n8 compatibleinterrupt-parent#address-cells#size-cellsmodelcpudevice_typeregcpu-idle-statesphandleenable-methodentry-methodlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usarm,psci-suspend-paramclock-frequency#clock-cellsinterruptsclocksclock-namesstatusinterrupt-controller#interrupt-cellsserial0stdout-path