"8( ',Qualcomm Technologies, Inc. SM4450 QRD2qcom,sm4450-qrdqcom,sm4450chosen=serial0:115200n8clocksxo-board 2fixed-clockIYf sleep-clk 2fixed-clockI}Yfcpus cpu@0ncpu2arm,cortex-a55z~pscipscif l2-cache2cachefl3-cache2cachefcpu@100ncpu2arm,cortex-a55z~pscipscif l2-cache2cachefcpu@200ncpu2arm,cortex-a55z~pscipscifl2-cache2cachefcpu@300ncpu2arm,cortex-a55z~pscipscifl2-cache2cachefcpu@400ncpu2arm,cortex-a55z~pscipscifl2-cache2cachefcpu@500ncpu2arm,cortex-a55z~psci pscifl2-cache2cachef cpu@600ncpu2arm,cortex-a78z~psci pscifl2-cache2cachef cpu@700ncpu2arm,cortex-a78z~psci pscifl2-cache2cachef cpu-mapcluster0core0 core1 core2core3core4core5core6core7idle-statespscicpu-sleep-0-02arm,idle-state@  0Afcpu-sleep-1-02arm,idle-state@X 0Afdomain-idle-statescluster-sleep-02domain-idle-stateAD 0fcluster-sleep-12domain-idle-stateA3D 0!ffmemory@a0000000nmemoryzpmu2arm,armv8-pmuv3 Rpsci 2arm,psci-1.0smcpower-domain-cpu0]qfpower-domain-cpu1]qpower-domain-cpu2]qpower-domain-cpu3]qpower-domain-cpu4]qpower-domain-cpu5]qpower-domain-cpu6]qpower-domain-cpu7]qpower-domain-cpu-cluster0]qfreserved-memory cmd-db@80860000 2qcom,cmd-dbzsoc@0  2simple-busclock-controller@1000002qcom,sm4450-gcczBY]fgeniqup@ac00002qcom,geni-se-qupz \] m-ahbs-ahb okayserial@a880002qcom,geni-debug-uartz@Vse Rcdefaultokayhwlock@1f400002qcom,tcsr-mutexzinterrupt-controller@b2200002qcom,sm4450-pdcqcom,pdc z "@d$^^}? fpinctrl@f1000002qcom,sm4450-tlmmz0 R 0 <HVfqup-uart7-rx-statekgpio23 pqup1_se2_l2yfqup-uart7-tx-statekgpio22 pqup1_se2_l2yfinterrupt-controller@17200000 2arm,gic-v3 z & R  ftimer@174200002arm,armv7-timer-memzB  frame@17421000zBB Rframe@17423000zB0 R  disabledframe@17425000zBP R  disabledframe@17427000zBp R  disabledframe@17429000zB R  disabledframe@1742b000zB R  disabledframe@1742d000zB R disabledrsc@17a000002qcom,rpmh-rsc0zdrv-0drv-1drv-2$R apps_rsc  bcm-voter2qcom,bcm-voterclock-controller2qcom,sm4450-rpmh-clkY xoftimer2arm,armv8-timer0R   aliases$ /soc@0/geniqup@ac0000/serial@a88000 interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathclock-frequency#clock-cellsphandledevice_typeregenable-methodnext-level-cachepower-domainspower-domain-names#cooling-cellscache-levelcache-unifiedcpuentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterrupts#power-domain-cellsdomain-idle-statesrangesno-mapdma-ranges#reset-cellsclocksclock-namesstatuspinctrl-0pinctrl-names#hwlock-cellsqcom,pdc-ranges#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctiondrive-strengthbias-disable#redistributor-regionsredistributor-strideframe-numberreg-nameslabelqcom,tcs-offsetqcom,drv-idqcom,tcs-configserial0