8(!bananapi,bpi-r4mediatek,mt7988a +7Banana Pi BPI-R4 =embeddedcpus+cpu@0arm,cortex-a73JNcpuZpscicpu@1arm,cortex-a73JNcpuZpscicpu@2arm,cortex-a73JNcpuZpscicpu@3arm,cortex-a73JNcpuZpscioscillator-40m fixed-clockhbZxclkxtalpmuarm,cortex-a73-pmu  psci arm,psci-0.2asmcsoc simple-bus+interrupt-controller@c000000 arm,gic-v3PJ   @ A B    clock-controller@10001000 mediatek,mt7988-infracfgsysconJxclock-controller@1001b000 mediatek,mt7988-topckgensysconJxwatchdog@1001c000mediatek,mt7988-wdtJ nclock-controller@1001e000mediatek,mt7988-apmixedsysJxpwm@10048000mediatek,mt7988-pwmJP !1topmainpwm1pwm2pwm3pwm4pwm5pwm6pwm7pwm8 disabledi2c@11003000mediatek,mt7981-i2c J0!p .* maindma+ disabledi2c@11004000mediatek,mt7981-i2c J@!q .* maindma+ disabledi2c@11005000mediatek,mt7981-i2c JP!q .* maindma+ disabledusb@11190000'mediatek,mt7988-xhcimediatek,mtk-xhci J.>  macippc (KMIGU$sys_ckref_ckmcu_ckdma_ckxhci_ckusb@11200000'mediatek,mt7988-xhcimediatek,mtk-xhci J . >  macippc (LNJHV$sys_ckref_ckmcu_ckdma_ckxhci_ckclock-controller@11f40000mediatek,mt7988-xfi-pllJxclock-controller@15000000mediatek,mt7988-ethsyssysconJxclock-controller@15031000mediatek,mt7988-ethwarpJxtimerarm,armv8-timer 0    compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeregdevice_typeenable-methodclock-frequency#clock-cellsclock-output-namesinterruptsrangesinterrupt-controller#interrupt-cellsphandle#reset-cellsclocksclock-names#pwm-cellsstatusreg-namesresets