e8( t ,NXP i.MX8MQ EVK2fsl,imx8mq-evkfsl,imx8mqaliases&=/soc@0/bus@30800000/ethernet@30be0000"G/soc@0/bus@30000000/gpio@30200000"M/soc@0/bus@30000000/gpio@30210000"S/soc@0/bus@30000000/gpio@30220000"Y/soc@0/bus@30000000/gpio@30230000"_/soc@0/bus@30000000/gpio@30240000!e/soc@0/bus@30800000/i2c@30a20000!j/soc@0/bus@30800000/i2c@30a30000!o/soc@0/bus@30800000/i2c@30a40000!t/soc@0/bus@30800000/i2c@30a50000!y/soc@0/bus@30800000/mmc@30b40000!~/soc@0/bus@30800000/mmc@30b50000$/soc@0/bus@30800000/serial@30860000$/soc@0/bus@30800000/serial@30890000$/soc@0/bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30820000!/soc@0/bus@30800000/spi@30830000!/soc@0/bus@30800000/spi@30840000clock-ckil 2fixed-clockckil&clock-osc-25m 2fixed-clock}x@osc_25m'clock-osc-27m 2fixed-clockosc_27m(clock-hdmi-phy-27m 2fixed-clock hdmi_phy_27mclock-ext1 2fixed-clockk@ clk_ext1)clock-ext2 2fixed-clockk@ clk_ext2*clock-ext3 2fixed-clockk@ clk_ext3+clock-ext4 2fixed-clockk@ clk_ext4,cpus cpu@0cpu2arm,cortex-a53lpsci*@<IV@hu speed_grade cpu@1cpu2arm,cortex-a53lpsci*@<IV@hu cpu@2cpu2arm,cortex-a53lpsci*@<IV@hu cpu@3cpu2arm,cortex-a53lpsci*@<IV@hu l2-cache02cache,@>opp-table2operating-points-v2opp-800000000/  I-opp-1000000000;  I-opp-1300000000M|mB@ I-opp-1500000000Yh/B@ I-pmu2arm,cortex-a53-pmu 9psci 2arm,psci-1.0smcthermal-zonescpu-thermalDZhtripscpu-alertx8passive cpu-critx_ criticalcooling-mapsmap0 0 gpu-thermalDZhtripsgpu-alertx8passivegpu-critx_ criticalcooling-mapsmap0 vpu-thermalDZhtripsvpu-critx_ criticaltimer2arm,armv8-timer09   soc@02fsl,imx8mq-socsimple-bus >@@soc_unique_idetm@28440000"2arm,coresight-etm4xarm,primecell(D g apb_pclkout-portsportendpointetm@28540000"2arm,coresight-etm4xarm,primecell(T g apb_pclkout-portsportendpointetm@28640000"2arm,coresight-etm4xarm,primecell(d g apb_pclkout-portsportendpointetm@28740000"2arm,coresight-etm4xarm,primecell(t g apb_pclkout-portsportendpointfunnel2arm,coresight-static-funnelin-ports port@0endpointport@1endpointport@2endpointport@3endpointout-portsportendpointfunnel@28c03000+2arm,coresight-dynamic-funnelarm,primecell(0g apb_pclkin-ports port@0endpointport@1endpointout-portsportendpointetf@28c04000 2arm,coresight-tmcarm,primecell(@g apb_pclkin-portsportendpointout-portsportendpointetr@28c06000 2arm,coresight-tmcarm,primecell(`g apb_pclkin-portsportendpointbus@300000002fsl,aips-bussimple-bus0@  00@sai@300100002fsl,imx8mq-sai0 9_ busmclk1mclk2mclk3  rxtx  disabledsai@300300002fsl,imx8mq-sai0 9Z busmclk1mclk2mclk3 rxtx  disabledsai@300400002fsl,imx8mq-sai0 9Z busmclk1mclk2mclk3 rxtx  disabledsai@300500002fsl,imx8mq-sai0 9d busmclk1mclk2mclk3 rxtx  disabledgpio@302000002fsl,imx8mq-gpiofsl,imx35-gpio0 9@A#/DU! Tgpio@302100002fsl,imx8mq-gpiofsl,imx35-gpio0!9BC#/DU!(Ngpio@302200002fsl,imx8mq-gpiofsl,imx35-gpio0"9DE#/DU!=gpio@302300002fsl,imx8mq-gpiofsl,imx35-gpio0#9FG#/DU!W gpio@302400002fsl,imx8mq-gpiofsl,imx35-gpio0$9HI#/DU!wadefaulto";wl-reg-on-hogytmu@302600002fsl,imx8mq-tmu0& 91 &Ha@#)/5=CKQW _ g o#+3;CKU] g p#-7AKWco!-9ES_qwatchdog@302800002fsl,imx8mq-wdtfsl,imx21-wdt0( 9N okayadefaulto#watchdog@302900002fsl,imx8mq-wdtfsl,imx21-wdt0) 9O  disabledwatchdog@302a00002fsl,imx8mq-wdtfsl,imx21-wdt0* 9   disableddma-controller@302c00002fsl,imx8mq-sdmafsl,imx7d-sdma0, 9gipgahbimx/sdma/sdma-imx7d.binlcd-controller@30320000"2fsl,imx8mq-lcdiffsl,imx6sx-lcdif02 9pixaxidisp_axi !$###%:#g okayportendpoint$8pinctrl@303300002fsl,imx8mq-iomuxc03!vddarmgrpO\hfec1grphOhl#ptx|LRi2c1grp0O|@@=irgrpOXOimipidsigrpO\:pcie0grp0O,$vLapcie1grp0O0(v tcpcie1reggrpOlfqspigrpO\` tx|Pregusdhc2gpiogrpOTAgsai2grpxO$(0,H2sai3grp`O@DH<3spdif1grp0OPT0uart1grp0O4I8I1usdhc1grp O  $(,40Fusdhc1-100grp O  $(,40Gusdhc1-200grp O  $(,40Husdhc2gpiogrpO8AKusdhc2grpO<@DHLP8Jusdhc2-100grpO<@DHLP8Lusdhc2-200grpO<@DHLP8Mwdog1grpO0#wifiresetgrpOP"syscon@30340000(2fsl,imx8mq-iomuxc-gprsysconsimple-mfd04?mux-controller 2mmio-muxXk44efuse@303500002fsl,imx8mq-ocotpsyscon05 soc-uid@4speed-grade@10mac-address@90Qclock-controller@303600002fsl,imx8mq-anatop06 91snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd07%snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lpy%49 snvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkeyy% 9 snvs-pwrkeyt okayclock-controller@303800002fsl,imx8mq-ccm089UV&'()*+,9ckilosc_25mosc_27mclk_ext1clk_ext2clk_ext3clk_ext4@X!qu :/.+,#N Vreset-controller@303900002fsl,imx8mq-srcsyscon09 9Y7gpc@303a00002fsl,imx8mq-gpc0: 9W/Dpgc power-domain@05power-domain@1-`power-domain@2Zpower-domain@3\power-domain@4power-domain@5 fop.Xpower-domain@6 xyj #N:#F//^power-domain@7power-domain@8>power-domain@9 Cpower-domain@a -bus@304000002fsl,aips-bussimple-bus0@@  0@0@@pwm@306600002fsl,imx8mq-pwmfsl,imx27-pwm0f 9Qipgper  disabledpwm@306700002fsl,imx8mq-pwmfsl,imx27-pwm0g 9Ripgper  disabledpwm@306800002fsl,imx8mq-pwmfsl,imx27-pwm0h 9Sipgper  disabledpwm@306900002fsl,imx8mq-pwmfsl,imx27-pwm0i 9Tipgper  disabledtimer@306a00002nxp,sysctr-timer0j 9/'perbus@308000002fsl,aips-bussimple-bus0@ 00@spdif@308100002fsl,imx35-spdif0 9P:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba   rxtx okayadefaulto0#:wpspi@30820000 !2fsl,imx8mq-ecspifsl,imx51-ecspi0 9ipgper   rxtx  disabledspi@30830000 !2fsl,imx8mq-ecspifsl,imx51-ecspi0 9 ipgper   rxtx  disabledspi@30840000 !2fsl,imx8mq-ecspifsl,imx51-ecspi0 9!ipgper   rxtx  disabledserial@308600002fsl,imx8mq-uartfsl,imx6q-uart0 9ipgper   rxtx okayadefaulto1serial@308800002fsl,imx8mq-uartfsl,imx6q-uart0 9ipgper   rxtx  disabledserial@308900002fsl,imx8mq-uartfsl,imx6q-uart0 9ipgper   rxtx  disabledspdif@308a00002fsl,imx35-spdif0 9 P:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba   rxtx okay#:wqsai@308b00002fsl,imx8mq-sai0 9` busmclk1mclk2mclk3   rxtx okayadefaulto2#:wnsai@308c00002fsl,imx8mq-sai0 92 busmclk1mclk2mclk3   rxtx okayadefaulto3#:wkcrypto@30900000 2fsl,sec-v4.0 0 0 9[t aclkipgjr@10002fsl,sec-v4.0-job-ring 9i  disabledjr@20002fsl,sec-v4.0-job-ring  9jjr@30002fsl,sec-v4.0-job-ring0 9rdsi@30a000002fsl,imx8mq-nwl-dsi0 (!corerx_esctx_escphy_reflcdif#GL :Ĵր1- 9"456dphy 7777 bytedpiescpclk okayports port@0 endpoint@08$port@1endpoint9<panel@0o:adefault2raydium,rm67191 ;%portendpoint<9dphy@30a003002fsl,imx8mq-mipi-dphy0phy_ref !$###%:n6#g/5 okay6i2c@30a200002fsl,imx8mq-i2cfsl,imx21-i2c0 9#  okayadefaulto=pmic@8 2fsl,pfuze100regulatorssw1ab: R.sw1c: R/sw2:Rjsw3ab: Rjsw4:w@Rw@jIswbst:LK@RN0vsnvs:B@R-jvrefddrjvgen1: 5Rvgen2: PRjvgen3:R"jvgen4:˨R8jvgen5:.R7P(jbvgen6:w@R2Zi2c@30a300002fsl,imx8mq-i2cfsl,imx21-i2c0 9$   disabledi2c@30a400002fsl,imx8mq-i2cfsl,imx21-i2c0 9%   disabledi2c@30a500002fsl,imx8mq-i2cfsl,imx21-i2c0 9&   disabledserial@30a600002fsl,imx8mq-uartfsl,imx6q-uart0 9ipgper   rxtx  disabledcsi@30a700002fsl,imx8mq-mipi-csi20 coreescui :ր-@#LWN>7&7'7(~?@@dram  disabledports port@1endpointABcsi@30a900002fsl,imx8mq-csi0 9*mclk  disabledportendpointBAcsi@30b600002fsl,imx8mq-mipi-csi20 coreescui :ր-@#LWNC7)7*7+~?@@dram  disabledports port@1endpointDEcsi@30b800002fsl,imx8mq-csi0 9+mclk  disabledportendpointEDmailbox@30aa00002fsl,imx8mq-mufsl,imx6sx-mu0 9Xmmc@30b40000!2fsl,imx8mq-usdhcfsl,imx7d-usdhc0 9i ipgahbper okay:ׄ"adefaultstate_100mhzstate_200mhzoFGHI  mmc@30b50000!2fsl,imx8mq-usdhcfsl,imx7d-usdhc0 9i ipgahbper okay: "adefaultstate_100mhzstate_200mhzoJKLKMK (N 1Ospi@30bb0000 2fsl,imx8mq-qspifsl,imx7d-qspi0=QuadSPIQuadSPI-memory 9k qspi_enqspi okayadefaultoPflash@0 2micron,n25q256ajedec,spi-norG@Yjdma-controller@30bd00002fsl,imx8mq-sdmafsl,imx7d-sdma0 9tipgahbimx/sdma/sdma-imx7d.bin ethernet@30be00002fsl,imx8mq-fecfsl,imx6sx-fec009vwxy("ipgahbptpenet_clk_refenet_out h #LPQO:sY@{Q mac-address ? okayadefaultoR rgmii-idSmdio ethernet-phy@02ethernet-phy-ieee802.3-c22 T 'USvddh-regulatorUinterconnect@327000002fsl,imx8mq-nocfsl,imx8m-noc2pqV W@opp-table2operating-points-v2Wopp-133000000Uopp-400000000ׄopp-800000000/bus@32c000002fsl,aips-bussimple-bus2@  22@interrupt-controller@32e2d000$2fsl,imx8m-irqsteerfsl,imx-irqsteer2 9ipg!-@/Dgpu@38000000 2vivante,gc8 9 fopcoreshaderbusreg(adop(#:////Xusb@381000002fsl,imx8mq-dwc3snps,dwc38bus_earlyrefsuspendn#VH:e 9(YYusb2-phyusb3-phyZ:  disabledusb-phy@381f00402fsl,imx8mq-usb-phy8@@phy#H:/  disabledYusb@382000002fsl,imx8mq-dwc3snps,dwc38 bus_earlyrefsuspendn#VH:e 9)[[usb2-phyusb3-phy\: okayYhostusb-phy@382f00402fsl,imx8mq-usb-phy8/@@phy#H:/ okay[video-codec@383000002nxp,imx8mq-vpu-g180 9]video-codec@383100002nxp,imx8mq-vpu-g281 9]blk-ctrl@383200002fsl,imx8mq-vpu-blk-ctrl82 ^^^ abusg1g2g1g2]pcie@338000002fsl,imx8mq-pcie3@ =dbiconfig pcit0~ 9zmsiD}|{z_}~ pciepcie_buspcie_phypcie_aux`777 pciephyappsturnoff|}~#TPG :沀 okayadefaultoa ;bpcie@33c000002fsl,imx8mq-pcie3@' =dbiconfig pcit0' ~ 9JmsiDMLKJ_ pciepcie_buspcie_phypcie_aux`7"7$7% pciephyappsturnoff#TPG :沀 okayadefaultoc ; dbpcie-ep@33c000002fsl,imx8mq-pcie-ep3@ =dbiaddr_space~ 9Pdma  pciepcie_buspcie_phypcie_aux`7"7$7% pciephyappsturnoff#TPG :沀  disabledinterrupt-controller@38800000 2arm,gic-v3(88 1 1 1 D/ 9 memory-controller@3d4000002fsl,imx8mq-ddrcfsl,imx8m-ddrc=@@corepllaltapb vw okayeVopp-table2operating-points-v2eopp-25000000}x@opp-100000000opp-166000000 ;opp-800000000/ddr-pmu@3d800000%2fsl,imx8mq-ddr-pmufsl,imx8m-ddr-pmu=@ 9bchosen$/soc@0/bus@30800000/serial@30860000memory@40000000memory@pcie0-refclk 2fixed-clock_regulator-pcie2regulator-fixedadefaultof *MPCIE_3V3:2ZR2Z ; 9dregulator-vsd-3v3adefaultog2regulator-fixed*VSD_3V3:2ZR2Z NLN 9Oregulator-buck2adefaultoh2regulator-gpio*vdd_arm: RB@ T \B@ cjir-receiver2gpio-ir-receiver T adefaultoiu}audio-codec-bt-sco 2linux,bt-scolaudio-codec 2wlf,wm8524 Tosound-bt-sco2simple-audio-card bt-sco-audiodsp_aj jsimple-audio-card,cpu 3k = Njsimple-audio-card,codec 3lsound-wm85242simple-audio-card wm8524-audioi2sm m1 aLineLeft Line Out JackLineRight Line Out Jack; {Left Line Out JackLINEVOUTLRight Line Out JackLINEVOUTRsimple-audio-card,cpu 3nmsimple-audio-card,codec 3osound-spdif2fsl,imx-audio-spdif ,imx-spdif p  sound-hdmi-arc2fsl,imx-audio-spdif ,imx-hdmi-arc q  interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3mmc0mmc1serial0serial1serial2serial3spi0spi1spi2#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2#cooling-cellsnvmem-cellsnvmem-cell-namescpu-supplycache-levelcache-unifiedopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspendinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendrangesdma-rangescpuclock-namesremote-endpoint#sound-dai-cellsdmasdma-namesstatusgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangespinctrl-namespinctrl-0gpio-hoggpiosoutput-highlittle-endianfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellsfsl,ext-reset-output#dma-cellsfsl,sdma-ram-script-nameassigned-clocksassigned-clock-parentsassigned-clock-ratesfsl,pins#mux-control-cellsmux-reg-masksregmapoffsetlinux,keycodewakeup-source#reset-cells#power-domain-cellspower-domainspower-supply#pwm-cellsmux-controlsphysphy-namesresetsreset-namesreset-gpiosdsi-lanes#phy-cellsregulator-min-microvoltregulator-max-microvoltregulator-always-onfsl,mipi-phy-gprinterconnectsinterconnect-names#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-1pinctrl-2vqmmc-supplynon-removableno-sdno-sdiocd-gpiosvmmc-supplyreg-namesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthfsl,num-tx-queuesfsl,num-rx-queuesfsl,stop-modephy-modephy-handlefsl,magic-packetreset-assert-usqca,disable-smarteeevddio-supplyfsl,ddrc#interconnect-cellsfsl,channelfsl,num-irqssnps,parkmode-disable-ss-quirkdr_modepower-domain-namesbus-rangenum-lanesinterrupt-namesinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainreset-gpiovph-supplyvpcie-supplynum-ib-windowsnum-ob-windowsstdout-pathregulator-nameenable-active-highoff-on-delay-usstatesregulator-boot-onlinux,autosuspend-periodwlf,mute-gpiossimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersound-daidai-tdm-slot-numdai-tdm-slot-widthsimple-audio-card,widgetssimple-audio-card,routingspdif-controllerspdif-outspdif-in