:87(S7P(STMicroelectronics STM32746g-EVAL board!st,stm32746g-evalst,stm32f746interrupt-controller@e000e100!arm,armv7m-nvic,AR Vtimer@e000e010!arm,armv7m-systickR^okay esoc !simple-busl}timers@40000000!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@2!st,stm32-timer-triggerR ^disabledtimers@40000800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  e^okay2timers@40001000!st,stm32-timersR@ eint ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ eint ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@  eint ^disabledpwm !st,stm32-pwm ^disabledrtc@40002800 !st,stm32-rtcR@( e  l ^okayserial@40004400!st,stm32f7-uartR@D& e ^disabledserial@40004800!st,stm32f7-uartR@H' e ^disabledserial@40004c00!st,stm32f7-uartR@L4 e ^disabledserial@40005000!st,stm32f7-uartR@P5 e ^disabledi2c@40005400!st,stm32f7-i2cR@T  e^okaydefault stmfx@42!st,stmfx-0300RBlpinctrl!st,stmfx-0300-pinctrl%5,AAVjoystickMgpio0gpio1gpio2gpio3gpio4RbVi2c@40005800!st,stm32f7-i2cR@X!" e ^disabledi2c@40005c00!st,stm32f7-i2cR@\HI e ^disabledi2c@40006000!st,stm32f7-i2cR@`_` e ^disabledcec@40006c00 !st,stm32-cecR@l^e cechdmi-cec ^disabledserial@40007800!st,stm32f7-uartR@xR e ^disabledserial@40007c00!st,stm32f7-uartR@|S e ^disabledtimers@40010000!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@0!st,stm32-timer-triggerR ^disabledtimers@40010400!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32f7-uartR@% e^okaydefaultserial@40011400!st,stm32f7-uartR@G e ^disabledmmc@40011c00!arm,pl180arm,primecelloR@ e apb_pclkgl ^disabledmmc@40012c00!arm,pl180arm,primecelloR@, e apb_pclk1l^okay defaultopendrain  syscon@40013800!st,stm32-syscfgsysconR@8Vinterrupt-controller@40013c00!st,stm32-exti,AR@<8 ()*>LVtimers@40014000!st,stm32-timersR@@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@H eint ^disabledpwm !st,stm32-pwm ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVcrc@40023000!st,stm32f7-crcR@0 e ^okayrcc@40023800!st,stm32f746-rccst,stm32-rccR@8e  B@Vdma-controller@40026000 !st,stm32-dmaR@` / e ^disableddma-controller@40026400 !st,stm32-dmaR@d 89:;<DEF e ^disabledusb@40040000!st,stm32f7-hsotgR@M eotg  $@@@@ ^okay3otg; @usb2-phydefaultusb@50000000!st,stm32f4x9-fsotgRPC e'otg ^disabledpin-controller@40020000 }@0lJ!st,stm32f746-pinctrlgpio@40020000%5,AR e\GPIOAgpio@40020400%5,AR e\GPIOBVgpio@40020800%5,AR e\GPIOCVgpio@40020c00%5,AR  e\GPIODgpio@40021000%5,AR e\GPIOEgpio@40021400%5,AR e\GPIOFVgpio@40021800%5,AR e\GPIOGgpio@40021c00%5,AR e\GPIOHgpio@40022000%5,AR  e\GPIOIVgpio@40022400%5,AR$ e \GPIOJgpio@40022800%5,AR( e \GPIOKcec-0pinsipzusart1-0Vpins1i Rppins2i usart1-1pins1i Rppins2ii2c1-0Vpinsizpusbotg-hs-0Vpins0it          Rpusbotg-hs-1pins0it "          Rpusbotg-fs-0pins i Rpsdio-pins-a-0V pinsi( ) * + , 2 Rpsdio-pins-od-a-0V pins1i( ) * + , Rppins2i2 zpsdio-pins-b-0pinsii j   6 7 Rpsdio-pins-od-b-0pins1ii j   6 Rppins2i7 zpclocksclk-hse !fixed-clock}x@V clk-lse !fixed-clockclk-lsi !fixed-clock}clk-i2s-ckin !fixed-clocklV chosenroot=/dev/ramserial0:115200n8memory@c0000000memoryRaliases/soc/serial@40011000leds !gpio-ledsled-green   heartbeatled-orange led-red led-blue gpio-keys !gpio-keysbutton-0Wake up  joystick !gpio-keysdefaultbutton-0JoySellbutton-1JoyDownllbutton-2JoyLeftilbutton-3 JoyRightjlbutton-4JoyUpglusb-phy !usb-nop-xceiv e main_clkVmmc_vcard!regulator-fixed mmc_vcard#2Z;2ZV  #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesclock-names#pwm-cellsinterruptsassigned-clocksassigned-clock-parentsst,syscfgresetspinctrl-0pinctrl-namesi2c-scl-rising-time-nsi2c-scl-falling-time-nsgpio-controller#gpio-cellsgpio-rangespinsdrive-push-pullbias-pull-uparm,primecell-periphidmax-frequencyvmmc-supplybroken-cdpinctrl-1bus-width#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modephysphy-namespins-are-numberedst,bank-namepinmuxslew-ratedrive-open-drainbias-disableclock-frequencybootargsstdout-pathdevice_typeserial0gpioslinux,default-triggerautorepeatlabellinux,code#phy-cellsregulator-nameregulator-min-microvoltregulator-max-microvolt