8( XT,firefly,firefly-rk3288-betarockchip,rk3288&7Firefly-RK3288 Betaaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbopp-table-0operating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|preserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshcр 5Drvbiuciuciu-driveciu-sample  @'reset3okay:DVgydefault mmc@ff0d0000rockchip,rk3288-dw-mshcр 5Eswbiuciuciu-driveciu-sample ! @'reset3okay:ydefault mmc@ff0e0000rockchip,rk3288-dw-mshcр 5Ftxbiuciuciu-driveciu-sample "@'reset 3disabledmmc@ff0f0000rockchip,rk3288-dw-mshcр 5Guybiuciuciu-driveciu-sample #@'reset3okay:Dydefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW 'saradc-apb3okaybspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default !"#3okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default$%&' 3disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default()*+ 3disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault,3okayi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault- 3disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault.3okayi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault/3okayb{serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclktxrxdefault 0123okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclktxrxdefault33okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault43okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclktxrxdefault53okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclk  txrxdefault6 3disableddma-controller@ff250000arm,pl330arm,primecell%@-5 apb_pclkbthermal-zonesreserve-thermalDZh7cpu-thermalDdZh7tripscpu_alert0xppassiveb8cpu_alert1x$passiveb9cpu_critx_ criticalcooling-mapsmap080map190gpu-thermalDdZh7tripsgpu_alert0xppassiveb:gpu_critx_ criticalcooling-mapsmap0: ;tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk 'tsadc-apbinitdefaultsleep<=<>s3okayb7ethernet@ff290000rockchip,rk3288-gmac)#macirqeth_wake_irq>85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 'stmmaceth3okay3C?Zinputdefault@ABCgDrrgmii{ 'B@ E0usb@ff500000 generic-ehciP 5Fusb 3disabledusb@ff520000 generic-ohciR )5Fusb 3disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostG usb2-phy3okaydefaultHusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ I usb2-phy3okayusb@ff5c0000 generic-ehci\ 5 3disableddma-controller@ff600000arm,pl330arm,primecell`@-5 apb_pclk 3disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultJ3okaysyr827@40silergy,syr827&@Cvdd_cpuR Pjp,@b syr828@41silergy,syr828&ACvdd_gpuR Pjpbhym8563@51haoyu,hym8563Qxin32k&KdefaultLact8846@5aactive-semi,act8846ZdefaultMN(4@OregulatorsREG1Cvcc_ddrROjOREG2Cvcc_ioR2Zj2ZbREG3Cvdd_logRjREG4Cvcc_20RjbOREG5 Cvccio_sdR2Zj2ZbREG6 Cvdd10_lcdRB@jB@REG7Cvcca_18Rw@jw@REG8Cvcca_33R2Zj2ZbcREG9Cvcc_lanR2Zj2ZbDREG10Cvdd_10RB@jB@REG11Cvcc_18Rw@jw@bREG12 Cvcc18_lcdRw@jw@i2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultP3okaypwm@ff680000rockchip,rk3288-pwmhLdefaultQ5_3okaypwm@ff680010rockchip,rk3288-pwmhLdefaultR5_ 3disabledpwm@ff680020rockchip,rk3288-pwmh LdefaultS5_ 3disabledpwm@ff680030rockchip,rk3288-pwmh0LdefaultT5_ 3disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllerW3hC bhpower-domain@9 5chgfdehilkj$kUVWXYZ[\]Wpower-domain@11 5opk^_Wpower-domain@12 5k`Wpower-domain@13 5kabWreboot-modesyscon-reboot-moderyRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv>H3jk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb>edp-phyrockchip,rk3288-dp-phy5h24m 3disabledbxio-domains"rockchip,rk3288-io-voltage-domain3okaycd D(8DRusbphyrockchip,rk3288-usb-phy3okayusb-phy@320 5]phyclk 'phy-resetbIusb-phy@33445^phyclk 'phy-resetbFusb-phy@348H5_phyclk 'phy-resetbGwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p O3okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif^5T mclkhclketx 6defaultf> 3disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s^ 55Ri2s_clki2s_hclkeetxrxdefaultgo 3disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk 'crypto-rstiommu@ff900800rockchip,iommu@ 5 aclkiface 3disablediommu@ff914000rockchip,iommu @P 5 aclkiface 3disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkh ilm 'coreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_voph def 'axiahbdclki3okayportb endpoint@0jb|endpoint@1kbyendpoint@2lbsendpoint@3mbviommu@ff930300rockchip,iommu 5 aclkifaceh 3okaybivop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_voph  'axiahbdclkn3okayportb endpoint@0ob}endpoint@1pbzendpoint@2qbtendpoint@3rbwiommu@ff940300rockchip,iommu 5 aclkifaceh 3okaybnmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkh > 3disabledportsportendpoint@0sblendpoint@1tbqlvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcuh > 3disabledportsport@0endpoint@0vbmendpoint@1wbrdp@ff970000rockchip,rk3288-dp@ b5icdppclkxdpo'dp> 3disabledportsport@0endpoint@0ybkendpoint@1zbphdmi@ff980000rockchip,rk3288-dw-hdmi^> g5hmniahbisfrcech 3okay{portsportendpoint@0|bjendpoint@1}bovideo-codec@ff9a0000rockchip,rk3288-vpu   #vepuvdpu5 aclkhclk~h iommu@ff9a0800rockchip,iommu 5 aclkifaceh b~iommu@ff9c0440rockchip,iommu @@@ o5 aclkiface 3disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ #jobmmugpu5h 3okayb;opp-table-1operating-points-v2bopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000rockchip,rk3288-qossyscon baqos@ffaa0080rockchip,rk3288-qossyscon bbqos@ffad0000rockchip,rk3288-qossyscon bVqos@ffad0100rockchip,rk3288-qossyscon bWqos@ffad0180rockchip,rk3288-qossyscon bXqos@ffad0400rockchip,rk3288-qossyscon bYqos@ffad0480rockchip,rk3288-qossyscon bZqos@ffad0500rockchip,rk3288-qossyscon bUqos@ffad0800rockchip,rk3288-qossyscon b[qos@ffad0880rockchip,rk3288-qossyscon b\qos@ffad0900rockchip,rk3288-qossyscon b]qos@ffae0000rockchip,rk3288-qossyscon b`qos@ffaf0000rockchip,rk3288-qossyscon b^qos@ffaf0080rockchip,rk3288-qossyscon b_dma-controller@ffb20000arm,pl330arm,primecell@-5 apb_pclkbeefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400 @ @ `   bpinctrlrockchip,rk3288-pinctrl>gpio@ff750000rockchip,gpio-banku Q5@/? bgpio@ff780000rockchip,gpio-bankx R5A/? gpio@ff790000rockchip,gpio-banky S5B/? gpio@ff7a0000rockchip,gpio-bankz T5C/? gpio@ff7b0000rockchip,gpio-bank{ U5D/? bEgpio@ff7c0000rockchip,gpio-bank| V5E/? gpio@ff7d0000rockchip,gpio-bank} W5F/? gpio@ff7e0000rockchip,gpio-bank~ X5G/? bKgpio@ff7f0000rockchip,gpio-bank Y5H/? bhdmihdmi-cec-c0Khdmi-cec-c7Khdmi-ddc Khdmi-ddc-unwedge Kpcfg-output-lowYbpcfg-pull-updbpcfg-pull-downqbpcfg-pull-nonebpcfg-pull-none-12ma bsuspendglobal-pwroffKddrio-pwroffKddr0-retentionKddr1-retentionKedpedp-hpdK i2c0i2c0-xfer KbJi2c1i2c1-xfer Kb,i2c2i2c2-xfer K  bPi2c3i2c3-xfer Kb-i2c4i2c4-xfer Kb.i2c5i2c5-xfer Kb/i2s0i2s0-bus`Kbglcdclcdc-ctl@Kbusdmmcsdmmc-clkKb sdmmc-cmdKbsdmmc-cdKbsdmmc-bus1Ksdmmc-bus4@Kbsdmmc-pwrK bsdio0sdio0-bus1Ksdio0-bus4@Kbsdio0-cmdKbsdio0-clkKbsdio0-cdKsdio0-wpKsdio0-pwrKsdio0-bkpwrKsdio0-intKsdio1sdio1-bus1Ksdio1-bus4@Ksdio1-cdKsdio1-wpKsdio1-bkpwrKsdio1-intKsdio1-cmdKsdio1-clkKsdio1-pwrK emmcemmc-clkKbemmc-cmdKbemmc-pwrK bemmc-bus1Kemmc-bus4@Kemmc-bus8Kbspi0spi0-clkK bspi0-cs0K b spi0-txKb!spi0-rxKb"spi0-cs1Kb#spi1spi1-clkK b$spi1-cs0K b'spi1-rxKb&spi1-txKb%spi2spi2-cs1Kspi2-clkKb(spi2-cs0Kb+spi2-rxKb*spi2-txK b)uart0uart0-xfer Kb0uart0-ctsKb1uart0-rtsKb2uart1uart1-xfer K b3uart1-ctsK uart1-rtsK uart2uart2-xfer Kb4uart3uart3-xfer Kb5uart3-ctsK uart3-rtsK uart4uart4-xfer Kb6uart4-ctsK uart4-rtsK tsadcotp-pinK b<otp-outK b=pwm0pwm0-pinKbQpwm1pwm1-pinKbRpwm2pwm2-pinKbSpwm3pwm3-pinKbTgmacrgmii-pinsK b@rmii-pinsKphy-intK bCphy-pmebKbBphy-rstKbAspdifspdif-txK bfpcfg-output-highbpcfg-pull-up-drv-12mad bact8846pwr-holdKbNpmic-vselKbMdvpdvp-pwrK bhym8563rtc-intKbLkeyspwr-keyKbledspower-led-pinKbwork-led-pinKbusb_hosthost-vbus-drvKbusbhub-rstKbHusb_otgotg-vbus-drvK birir-intKbmemory@0memoryadc-keys adc-keysbuttonsw@button-recovery Recoveryhdovdd-1v8-regulatorregulator-fixed Cdovdd_1v8Rw@jw@bdexternal-gmac-clock fixed-clocksY@ ext_gmacb?ir-receivergpio-ir-receiverdefault Kgpio-keys gpio-keyspower   GPIO Powertdefaultleds gpio-ledsled-0 firefly:blue:user rc-feedbackdefaultled-1 firefly:green:power default-ondefaultvsys-regulatorregulator-fixedCvcc_sysRLK@jLK@bsdmmc-regulatorregulator-fixed K defaultCvcc_sdR2Zj2Z 4bflash-regulatorregulator-fixed Cvcc_flashRw@jw@busb-regulatorregulator-fixedCvcc_5vRLK@jLK@busb-host-regulatorregulator-fixed E default Cvcc_host_5vRLK@jLK@usb-otg-regulatorregulator-fixed E  default Cvcc_otg_5vRLK@jLK@vcc28-dvp-regulatorregulator-fixed E  default Cvcc28_dvpR*j*b #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltgpioswakeup-sourcelinux,default-triggerstartup-delay-usenable-active-high