vU8n@(n),mundoreader,bq-edison2qcrockchip,rk31887BQ Edison2 Quad-Corealiases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000/spi@20070000/spi@20074000/mmc@10214000/mmc@10218000/mmc@1021c000oscillator ,fixed-clockn6xin24mgpu@10090000",rockchip,rk3188-maliarm,mali-400  buscorex okayx 5gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3.video-codec@10104000(,rockchip,rk3188-vpurockchip,rk3066-vpu@   vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu.cache-controller@10138000,arm,pl310-cache<JVLscu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer     disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gic^sVserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart@ "baudclkapb_pclk@L okaydefault bluetooth,brcm,bcm43438-bt   default serial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart` #baudclkapb_pclkAM okaydefault qos@1012d000,rockchip,rk3066-qossyscon V'qos@1012e000,rockchip,rk3066-qossyscon V&qos@1012f000,rockchip,rk3066-qossyscon V!qos@1012f080,rockchip,rk3066-qossyscon V#qos@1012f100,rockchip,rk3066-qossyscon V$qos@1012f180,rockchip,rk3066-qossyscon V"qos@1012f200,rockchip,rk3066-qossyscon qos@1012f280,rockchip,rk3066-qossyscon V%usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg @@ * /usb2-phy okayusb@101c0000 ,snps,dwc2 otghost* /usb2-phy okayethernet@10204000,rockchip,rk3188-emac @< 9D hclkmacrefdFrmii  disabledmmc@10214000,rockchip,rk2928-dw-mshc!@ HbiuciuOTrx-tx^Qireset okayudefaultmmc@10218000,rockchip,rk2928-dw-mshc! IbiuciuOTrx-tx^Rireset okayudefault wifi@1,brcm,bcm4329-fmac host-wakedefaultmmc@1021c000,rockchip,rk2928-dw-mshc! JbiuciuOTrx-tx^Sireset okayudefault nand-controller@10500000,rockchip,rk2928-nfcP@ ahb  disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @VZreboot-mode,syscon-reboot-mode @RBRB*RB :RBpower-controller!,rockchip,rk3188-power-controllerFVpower-domain@7hOZ!"#$%Fpower-domain@6 Z&Fpower-domain@8Z'Fgrf@20008000&,rockchip,rk3188-grfsysconsimple-mfd Vio-domains",rockchip,rk3188-io-voltage-domain  disabledusbphy,rockchip,rk3188-usb-phy okayusb-phy@10c QphyclkaVusb-phy@11cRphyclkaVdma-controller@20018000,arm,pl330arm,primecell @lw apb_pclkVXdma-controller@2001c000,arm,pl330arm,primecell @lw apb_pclk  disabledi2c@2002d000,rockchip,rk3188-i2c  (9i2cP okaydefault(accelerometer@29 ,st,lis3de)default)1000-10001i2c@2002f000,rockchip,rk3188-i2c  )9Qi2c okaydefault*tmp108@48 ,ti,tmp108H+default,rtc@51,haoyu,hym8563Q default-xin32kVibattery@55 ,ti,bq27541U.V5pmic@5a,active-semi,act8846Zdefault/0111 1!1-1regulatorsREG19VCC_DDRHO`OxREG29VDD_LOGHB@`OxREG39VDD_ARMH Y`pxVNREG49VCC_IOH-`-xVREG59VDD_10HB@`B@xREG69VDD_12HO`OxREG7 9VCC18_CIFHw@`w@xREG89VCCA_33H2Z`2ZxREG99VCC_TPH2Z`2ZxREG10 9VCCIO_WLH*`*xVREG119VCC_18Hw@`w@xVCREG12 9VCC28_CIFH*`*xVlcharger@6b ,ti,bq24196kdefault 23405V.usb-otg-vbuspwm@20030000,rockchip,rk2928-pwm F  disableddefault6pwm@20030010,rockchip,rk2928-pwm F okaydefault7V_watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt K 3 okaypwm@20050020,rockchip,rk2928-pwm  G  disableddefault8pwm@20050030,rockchip,rk2928-pwm 0G  disableddefault9i2c@20056000,rockchip,rk3188-i2c ` *9Ri2c okaydefault:touchscreen@3e,edt,edt-ft5506>+default;< !i2c@2005a000,rockchip,rk3188-i2c  +9Si2c okaydefault=i2c@2005e000,rockchip,rk3188-i2c  49Ti2c okaydefault>codec@1b,realtek,rt5616Kmclk9serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart @ $baudclkapb_pclkBN okaydefault?serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart  %baudclkapb_pclkCO okaydefault @ABsaradc@2006c000,rockchip,saradc  JGJsaradcapb_pclkW isaradc-apb okay\Cspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiEHspiclkapb_pclk & O  Ttxrx  disableddefaultDEFGspi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiFIspiclkapb_pclk ' @O  Ttxrx  disableddefaultHIJKdma-controller@20078000,arm,pl330arm,primecell @lw apb_pclkVcpushrockchip,rk3066-smpcpu@0vcpu,arm,cortex-a9L@MNcpu@1vcpu,arm,cortex-a9LMNcpu@2vcpu,arm,cortex-a9LMNcpu@3vcpu,arm,cortex-a9LMNopp-table-0,operating-points-v2VMopp-312000000 Y@opp-504000000 nHopp-600000000#F~opp-8160000000,opp-1008000000<g8opp-1200000000G0opp-1416000000Tfropp-1608000000_"pdisplay-subsystem,rockchip,display-subsystemOPsram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3188-vop  aclk_vopdclk_vophclk_vop.def iaxiahbdclk okayportVOendpoint QVcvop@1010e000,rockchip,rk3188-vop aclk_vopdclk_vophclk_vop.ghi iaxiahbdclk okaydefaultRSTUVportVPtimer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timer  .EW pclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timer   @BZ pclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s   defaultWKi2s_clki2s_hclkOXXTtxrx59 okaysound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif 9N mclkhclkOXTtx  defaultY okayclock-controller@20000000,rockchip,rk3188-cru 9O@^_ #g nрxhрxhVefuse@20010000,rockchip,rk3188-efuse @[ pclk_efusecpu_leakage@17pinctrl,rockchip,rk3188-pinctrl9\Zgpio@2000a000,rockchip,rk3188-gpio-bank0  6Uiy^sVgpio@2003c000,rockchip,gpio-bank  7Viy^sV+gpio@2003e000,rockchip,gpio-bank  8Wiy^sgpio@20080000,rockchip,gpio-bank  9Xiy^sVpcfg-pull-upV\pcfg-pull-downpcfg-pull-noneV[emmcemmc-clk[Vemmc-cmd\Vemmc-rst[emacemac-xfer[[[[[[[[emac-mdio [[i2c0i2c0-xfer [[V(i2c1i2c1-xfer [[V*i2c2i2c2-xfer [[V:i2c3i2c3-xfer [[V=i2c4i2c4-xfer [[V>lcdc1lcdc1-dclk[VRlcdc1-den[VSlcdc1-hsync[VTlcdc1-vsync[VUldcd1-rgb24[[[[[[[[[ [ [ [ [ [[[[[[[[[[[VVpwm0pwm0-out[V6pwm1pwm1-out[V7pwm2pwm2-out[V8pwm3pwm3-out[V9spi0spi0-clk\VDspi0-cs0\VGspi0-tx\VEspi0-rx\VFspi0-cs1\spi1spi1-clk\VHspi1-cs0\VKspi1-rx\VJspi1-tx\VIspi1-cs1\uart0uart0-xfer \[Vuart0-cts[Vuart0-rts[Vuart1uart1-xfer \[V uart1-cts[uart1-rts[uart2uart2-xfer \ [V?uart3uart3-xfer  \ [V@uart3-cts [VAuart3-rts [VBsd0sd0-clk[Vsd0-cmd[Vsd0-cd[Vsd0-wp [sd0-pwr[sd0-bus-width1[sd0-bus-width4@[[[[Vsd1sd1-clk[Vsd1-cmd[Vsd1-cd[sd1-wp[sd1-bus-width1[sd1-bus-width4@[[[[Vi2s0i2s0-bus`[[[[[[VWspdifspdif-tx[VYpcfg-output-highV^pcfg-output-lowV]act8846dvs0-ctl]V/pmic-int \V0bq24196charger-int\V2chg-ctl^V3chg-det[chg-en]dc-det [otg-en ^V4cameracif0-pdn [cif1-pdn [cif-avdd-en[Vkdisplaylcd-cs[Vflcd-en[Vnft5606tp-int\V;tp-rst[V<hdmihdmi-int\hdmi-rst [hym8563rtc-int \V-keyspwr-hold\Vbpwr-key\V`lis3degsensor-int[V)mmcsdmmc-pwr[Vqtmp108tmp-alrt[V,usbv5-drv[Vmotg-drv [Vousb-int\Vark903bt-host-wake\V bt-reg-on[V bt-rst^V bt-wake[V wifi-host-wake\Vwifi-reg-on[Vjmemory@60000000vmemory`backlight,pwm-backlight1 _aVegpio-keys ,gpio-keysdefault`apower tGPIO Key Powerd$wake-on-usb Wake-on-USB $gpio-poweroff,gpio-poweroff defaultb2 lvds-encoder,ti,sn75lvds83lvds-encoderportsport@0endpoint cVQport@1endpoint dVhpanel,innolux,ee101ia-01dpanel-lvdsBe LdefaultfgYvesa-24fppanel-timingJy   portendpoint hVdsdio-pwrseq,mmc-pwrseq-simplei ext_clockdefaultj Vcif-avdd-regulator,regulator-fixed 9avdd-cifH*`* +defaultklvcc-5v-regulator,regulator-fixed9vcc-5vHLK@`LK@ defaultm1Vplcd-regulator,regulator-fixed9vcc-lcd defaultnPVgusb-otg-regulator,regulator-fixed9vcc-otgHLK@`LK@  defaultopsdmmc-regulator,regulator-fixed9vcc-sdH2Z`2Z defaultqVemmc-vccq-regulator,regulator-fixed 9vccq-emmcH*`*V vsys-regulator,regulator-fixed9vsysHLK@`LK@V1 #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1mmc2clock-frequency#clock-cellsclock-output-namesregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelphandleinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0max-speeddevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfphy-modedmasdma-namesfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplykeep-power-in-suspendmmc-pwrseqnon-removablevqmmc-supplybrcm,drive-strengthoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstrotation-matrixvdd-supply#thermal-sensor-cellspower-suppliesvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onti,system-minimum-microvoltmonitored-batteryomit-battery-class#pwm-cellsreset-gpiostouchscreen-inverted-ytouchscreen-size-ytouchscreen-size-xtouchscreen-swapped-x-y#sound-dai-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrangesremote-endpointrockchip,playback-channelsrockchip,capture-channels#reset-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-highoutput-lowpower-supplypwmsautorepeatlinux,codelabellinux,input-typedebounce-intervalwakeup-sourceactive-delay-msbacklightenable-gpiosdata-mappingheight-mmwidth-mmhactivevactivehback-porchhfront-porchhsync-lenvback-porchvfront-porchvsync-lengpiostartup-delay-usvin-supplyenable-active-highregulator-boot-on