#8 @( ,Samsung Galaxy S III Neo2samsung,s3ve3gqcom,msm8226chosen=serial0:115200n8memory@0ImemoryUclocksxo_board 2fixed-clockYf$v sleep_clk 2fixed-clockYffirmwarescm2qcom,scm-msm8226qcom,scm~corebusifacehwlock2qcom,tcsr-mutex vreserved-memorysmem@3000000Uvsmd 2qcom,smdrpm  rpm-requests2qcom,rpm-msm8226 rpm_requestspower-controller2qcom,msm8226-rpmpdopp-table2operating-points-v2vopp1opp2opp3opp4opp5opp6smem 2qcom,smem(9soc 2simple-businterrupt-controller@f90000002qcom,msm-qgic2U AVvsyscon@f90110002sysconUvsdhci@f9824900%2qcom,msm8226-sdhciqcom,sdhci-msm-v4UI@ghc_memcore_mem{qhc_irqpwr_irq~ coreifacexodefault  disabledsdhci@f98a4900%2qcom,msm8226-sdhciqcom,sdhci-msm-v4UI@ghc_memcore_mem}qhc_irqpwr_irq~ coreifacexodefault  disabledsdhci@f9864900%2qcom,msm8226-sdhciqcom,sdhci-msm-v4UI@ghc_memcore_memqhc_irqpwr_irq~ coreifacexodefault  disabledserial@f991f000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmU m~iW coreifaceokserial@f9920000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmU n~kW coreiface disabledi2c@f9923000 disabled2qcom,i2c-qup-v2.1.1U0 _~YW coreifacedefault i2c@f9924000 disabled2qcom,i2c-qup-v2.1.1U@ `~[W coreifacedefaulti2c@f9925000 disabled2qcom,i2c-qup-v2.1.1UP a~]W coreifacedefaulti2c@f9926000 disabled2qcom,i2c-qup-v2.1.1U` b~_W coreifacedefaulti2c@f9927000 disabled2qcom,i2c-qup-v2.1.1Up c~aW coreifacedefaultusb@f9a55000 2qcom,ci-hdrcUPR ~  ifacecore xh coreulpiotg usb-phy( disabled-vulpiphy(2qcom,usb-hs-phy-msm8226qcom,usb-hs-phy: ~  refsleep phyporEDh$vclock-controller@fc4000002qcom,gcc-msm8226U@@Y-vpinctrl@fd5100002qcom,msm8226-pinctrlUQ@ScouAV vblsp1-i2c1 {gpio2gpio3 blsp_i2c1v blsp1-i2c2 {gpio6gpio7 blsp_i2c2vblsp1-i2c3{gpio10gpio11 blsp_i2c3vblsp1-i2c4{gpio14gpio15 blsp_i2c4vblsp1-i2c5{gpio18gpio19 blsp_i2c5vsdhc1-default-statev clk {sdc1_clk cmd-data{sdc1_cmdsdc1_data sdhc2-default-statev clk {sdc2_clk cmd-data{sdc2_cmdsdc2_data sdhc3-default-statev clk{gpio44sdc3cmd{gpio43sdc3data{gpio39gpio40gpio41gpio42sdc3restart@fc4ab000 2qcom,psholdUJspmi@fc4cf0002qcom,spmi-pmic-arbgcoreintrcnfgULLL qperiph_irq AVrng@f9bff000 2qcom,prngU~coretimer@f90200002arm,armv7-timer-memUframe@f9021000U frame@f9023000 U0 disabledframe@f9024000 U@ disabledframe@f9025000 UP disabledframe@f9026000 U` disabledframe@f9027000 Up disabledframe@f9028000 U disabledmemory@fc4280002qcom,rpm-msg-ramUB@vsyscon@fd4840002sysconUH@ vtimer2arm,armv7-timer0aliases/soc/serial@f991f000 #address-cells#size-cellsinterrupt-parentmodelcompatiblestdout-pathdevice_typereg#clock-cellsclock-frequencyphandleclocksclock-namessyscon#hwlock-cellsrangesno-mapinterruptsqcom,ipcqcom,smd-edgeqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelmemory-regionqcom,rpm-msg-ramhwlocksinterrupt-controller#interrupt-cellsreg-namesinterrupt-namespinctrl-namespinctrl-0statusassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modehnp-disablesrp-disableadp-disableahb-burst-configphy-namesphys#reset-cells#phy-cellsqcom,init-seqgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthbias-disablebias-pull-upqcom,eeqcom,channelframe-numberserial0