X8(dQualcomm APQ8064/IFC6410"!qcom,apq8064-ifc6410qcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOZcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOkcpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOmcpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Oocpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Oql2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state Omemory@0ememoryDthermal-zonescpu0-thermal tripstrip0#$/lpassivetrip1#/ lcriticalcpu1-thermal ltripstrip0#$/lpassivetrip1#/ lcriticalcpu2-thermal tripstrip0#$/lpassivetrip1#/ lcriticalcpu3-thermal ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-pmu!qcom,krait-pmu : clockscxo_board !fixed-clockER$O2pxo_board !fixed-clockEROMsleep_clk !fixed-clockERO1hwmutex!qcom,sfpb-mutex b iOsmem !qcom,smemwsmd !qcom,smdmodem@0 :%  disabledq6@1 :Z  disableddsps@3 : @ disabledriva@6 :  disabledsmsm !qcom,smsm    @apps@0DO`modem@1D :&q6@2D :Ywcnss@3D :OYdsps@4D :firmwarescm!qcom,scm-apq8064 coreiio-hwmon !iio-hwmonT'   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@3CZO :[defaultiOsdc4-gpiosOCpios*sgpio63gpio64gpio65gpio66gpio67gpio68xsdc4sdcc1-pin-activeO<clk ssdc1_clkcmd ssdc1_cmd data ssdc1_data sdcc3-pin-activeclk ssdc3_clkcmd ssdc3_cmddata ssdc3_dataps_holdOmuxsgpio78xps_holdi2c1Omuxsgpio20gpio21xgsbi1pinconfsgpio20gpio21i2c1_pins_sleepOmuxsgpio20gpio21xgpiopinconfsgpio20gpio21gsbi1_uart_2pinsmuxsgpio18gpio19xgsbi1gsbi1_uart_4pinsmuxsgpio18gpio19gpio20gpio21xgsbi1i2c2Omuxsgpio24gpio25xgsbi2pinconfsgpio24gpio25i2c2_pins_sleepOmuxsgpio24gpio25xgpiopinconfsgpio24gpio25i2c3Omux sgpio8gpio9xgsbi3pinconf sgpio8gpio9i2c3_pins_sleepOmux sgpio8gpio9xgpiopinconf sgpio8gpio9i2c4Omuxsgpio12gpio13xgsbi4pinconfsgpio12gpio13i2c4_pins_sleepOmuxsgpio12gpio13xgpiopinconfsgpio12gpio13spi5_defaultOpinmuxsgpio51gpio52gpio54xgsbi5pinmux_csxgpiosgpio53pinconfsgpio51gpio52gpio54pinconf_cssgpio53spi5_sleepO pinmuxxgpiosgpio51gpio52gpio53gpio54pinconfsgpio51gpio52gpio53gpio54i2c6O"muxsgpio16gpio17xgsbi6pinconfsgpio16gpio17i2c6_pins_sleepO#muxsgpio16gpio17xgpiopinconfsgpio16gpio17gsbi6_uart_2pinsmuxsgpio14gpio15xgsbi6gsbi6_uart_4pinsO!muxsgpio14gpio15gpio16gpio17xgsbi6gsbi7_uart_2pinsO$muxsgpio82gpio83xgsbi7gsbi7_uart_4pinsmuxsgpio82gpio83gpio84gpio85xgsbi7i2c7O%muxsgpio84gpio85xgsbi7pinconfsgpio84gpio85i2c7_pins_sleepO&muxsgpio84gpio85xgpiopinconfsgpio84gpio85riva-fm-activesgpio14gpio15xriva_fmriva-bt-activesgpio16gpio17xriva_btriva-wlan-active#sgpio64gpio65gpio66gpio67gpio68 xriva_wlanhdmi-pinctrlOQmuxsgpio70gpio71gpio72xhdmipinconf_ddcsgpio70gpio71pinconf_hpdsgpio72card_detectOAmuxsgpio26xgpiopcie_pinmuxOPmuxsgpio27xgpioconfsgpio27 syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$:DRclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D Oclock-controller@20a8000!qcom,kpss-acc-v1D Oclock-controller@20b8000!qcom,kpss-acc-v1D O power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O sps-sic-non-secure@12100000!sysconDOgsbi@12440000okay!qcom,gsbi-v1.0.0DD iface=serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ :  coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1i [defaultsleepDF :  coreifaceokayR @eeprom@52 !atmel,24c128DR gsbi@12480000 disabled!qcom,gsbi-v1.0.0DH iface=i2c@124a0000!qcom,i2c-qup-v1.1.1DJi [defaultsleep :  coreiface disabledgsbi@16200000okay!qcom,gsbi-v1.0.0D  iface=i2c@16280000!qcom,i2c-qup-v1.1.1i [defaultsleepD( :  coreifaceokaygsbi@16300000okay!qcom,gsbi-v1.0.0D0 iface=i2c@16380000!qcom,i2c-qup-v1.1.1i [defaultsleepD8 :  coreifaceokaygsbi@1a200000okay!qcom,gsbi-v1.0.0D  iface=serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  :  coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1D( :i [defaultsleep  coreifaceokay #5gsbi@16500000okay!qcom,gsbi-v1.0.0DP iface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP :  coreifaceokay[defaulti!i2c@16580000!qcom,i2c-qup-v1.1.1i" #[defaultsleepDX :  coreiface disabledgsbi@16600000okay!qcom,gsbi-v1.0.0D` iface=serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` :  coreifaceokay[defaulti$i2c@16680000!qcom,i2c-qup-v1.1.1i% &[defaultsleepDh :  coreiface disabledrng@1a500000 !qcom,prngDP coressbi@c00000 !qcom,ssbiD ,pmic-arbiterpmic@1 !qcom,pm8821,:Lmpps@50!qcom,pm8821-mppqcom,ssbi-mppDP3OC'O'qcom,ssbi@500000 !qcom,ssbiDP ,pmic-arbiterpmic@0 !qcom,pm8921,:JO*gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP3C(,OO(wlan-gpiosOspiossgpio43xnormalAnledOtpiossgpio18xnormalAmpps@50!qcom,pm8921-mppqcom,ssbi-mppDP3OC) O)rtc@11d!qcom,pm8921-rtc,*:'DNpwrkey@1c!qcom,pm8921-pwrkeyD,*:23]= xoadc@197!qcom,pm8921-adcD f*NzOadc-channel@0Dadc-channel@1Dadc-channel@2Dadc-channel@4Dadc-channel@8Dadc-channel@9D adc-channel@aD adc-channel@bD adc-channel@cD adc-channel@dD adc-channel@eDadc-channel@fDqfprom@700000 !qcom,qfpromDp=calibDO+backup_calibDO,clock-controller@900000!qcom,gcc-apq8064D@+,calibcalib_backupEO clock-controller@28000000!qcom,lcc-apq8064D(Eclock-controller@4000000!qcom,mmcc-apq8064DEOGclock-controller@2011000!qcom,kpss-gccsysconDOrpm@108000!qcom,rpm-apq8064D $:ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccEOregulators!qcom,rpm-pm8921-regulators-.-(-A.P._/n/}/s1((0O.s2O\s3B@\I>ONs4w@w@0O-s7  0O/s8l1l2l3.2ZO4l4B@w@O5l5)0-O>l6-p-pO@l7l8l9l10O]l11l12l14l15l16l17l18l21l22l23O8l24O[l25l26l27l28l29lvs1OElvs2O^lvs3lvs4lvs5lvs6OOlvs7usb-switchhdmi-switchOSncpusb@12500000 !qcom,ci-hdrcDPP :d ~ coreiface  @core#ulpi,=0Busb-phyokayLotgO3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy12 sleepref3porT_4k5O0usb@12520000 !qcom,ci-hdrcDRR : ) ' coreiface ) dcore#ulpi,=6Busb-phyokayLhostO7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyT12 sleepref7por_4k8O6usb@12530000 !qcom,ci-hdrcDSS : , * coreiface , ecore#ulpi,=9Busb-phyokayLhostO:ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyT12 sleepref:por_4k8O9phy@1b400000!qcom,apq8064-sata-phyokayD@wphy_mem -cfgTO;sata@29000000!qcom,apq8064-ahcigeneric-ahciokayD) :( ; . )slave_ifaceifacebusrxoobcore_pmalive =; Bsata-phy-dma@12402000!qcom,bam-v1.3.0D@  :b nbam_clkO=dma@12182000!qcom,bam-v1.3.0D  :` pbam_clkO?dma@121c2000!qcom,bam-v1.3.0D  :_ qbam_clkOBamba !simple-bus=mmc@12400000okay!arm,pl18xarm,primecell[defaulti<D@  :hcmd_irq x nmclkapb_pclk==txrx#>/-mmc@12180000!arm,pl18xarm,primecellokayD  :fcmd_irq z pmclkapb_pclk q<??txrx#@[defaultiA Emmc@121c0000!arm,pl18xarm,primecellokayD  :ecmd_irq { qmclkapb_pclklBBtxrx[defaultiC#D/ENFsyscon@1a400000!qcom,tcsr-apq8064sysconD@Oadreno-3xx@4300000!qcom,adreno-320.2qcom,adrenoD0wkgsl_3d0_reg_memory :P kgsl_3d0_irqcoreifacememmem_iface GGGG!GYHHHHHHHHHH H H H H HHHHHHHHHHHHHHHHHHIIIIIIIIII I I I I IIIIIIIIIIIIIIIIII`Jopp-table!operating-points-v2OJopp-320000000ttopp-27000000tsyscon@5700000!sysconDppOLdsi@4700000!qcom,mdss-dsi-ctrl{MDSS DSI CTRL->0 :RDp wdsi_ctrl8GGGG9GTGjGX(ifacebuscore_mmsssrcbytepixelcore GSGWG8Gi KKKKL=KBdsiportsport@0Dendpointport@1Dendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960ETDppp\"wdsi_plldsi_phydsi_phy_regulatoriface_clkref GMOKiommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkG GDP:?@OViommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkG GD`:=>OWiommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkG G!D:EFOHiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkG G!D:OIpci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `wdbielbiparfconfigepci0= :msi$%&' + . -coreifacephy( l k j i haxiahbporpciphyokayN ODiP[default /hdmi-tx@4a00000!qcom,hdmi-tx-8960[defaultiQDwcore_physical :OG>G Gcoremaster_ifaceslave_iface=R Bhdmi-phyokay:SKD [Hportsport@0DendpointeTOXport@1DendpointeUOuhdmi-phy@4a00400!qcom,hdmi-phy-8960D`whdmi_phyhdmi_pllG slave_ifaceTokay:SORmdp@5100000 !qcom,mdp4D :K0GMGGGNG_G`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk YVVWWokayportsport@0Dendpointport@1Dendpointport@2Dendpointport@3DendpointeXOTriva-pil@3204000!qcom,riva-pilD   @ wccudxepmufY wdogfatalwZuN[- disabledO_iris !qcom,wcn36602xo5\]^smd-edge : {rivawcnss !qcom,wcnss WCNSS_CTRL_bt!qcom,wcnss-btwifi!qcom,wcnss-wlan:txrx` ` tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecellD apb_pclkin-portsportendpointeaOctpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpointebOdreplicator !arm,coresight-static-replicator apb_pclkout-portsport@0DendpointecOaport@1DendpointedObin-portsportendpointeeOjfunnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0DendpointefOlport@1DendpointegOnport@4DendpointehOpport@5DendpointeiOrout-portsportendpointejOeetm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclkkout-portsportendpointelOfetm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkmout-portsportendpointenOgetm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclkoout-portsportendpointepOhetm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclkqout-portsportendpointerOiregulator-fixed@1!regulator-fixed2Z2Z ext_3p3v(voltage7 5MH[ODaliases#m/soc/gsbi@16600000/serial@16640000#u/soc/gsbi@16500000/serial@16540000 }/soc/gsbi@12440000/i2c@12460000 /soc/gsbi@12480000/i2c@124a0000 /soc/gsbi@16200000/i2c@16280000 /soc/gsbi@16300000/i2c@16380000 /soc/gsbi@1a200000/spi@1a280000chosenserial0:115200n8pwrseq !simple-bussdcc4_pwrseq[defaultis!mmc-pwrseq-simple (+OFleds !gpio-leds[defaultitled@1{apq8064:green:user1 &(onhdmi-out!hdmi-connectorldportendpointeuOU #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizenum-cscs-gpiosqcom,controller-typepower-sourceallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyvdd_l1_l2_l12_l18-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implementedtarget-supply#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosmmc-pwrseqiommusoperating-points-v2opp-hzlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiocore-vdda-supplyhdmi-mux-supplyhpd-gpiosremote-endpointvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namescpuregulator-nameregulator-typestartup-delay-usenable-active-highregulator-boot-onserial0serial1i2c0i2c1i2c2i2c3spi0stdout-pathreset-gpiosdefault-state