98( Y"ti,omap3-ldpti,omap3430ti,omap3 +!7TI OMAP3430 LDP (Zoom1 Labrador)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/displaycpus+cpu@0arm,cortex-a8|cpucpu pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 5Spinmux_twl4030_pinspApinmux_gpio_key_pinsHp pinmux_musb_pins`prz|~vxtpinmux_mmc1_pins0pscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clock mcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 5Spinmux_twl4030_vpins ptarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss  ick+ H ` aes1@0 ti,omap3-aesP  txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss  ick+ H P aes2@0 ti,omap3-aesPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock%Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock5p@!sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockWbdpll3_m2x2_ckfixed-factor-clockWb dpll4_x2_ckfixed-factor-clockWbcorex2_fckfixed-factor-clock Wb"wkup_l4_ickfixed-factor-clock!WbQcorex2_d3_fckfixed-factor-clock"Wbcorex2_d5_fckfixed-factor-clock"Wbclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock%omap_32k_fck fixed-clock%Cvirt_12m_ck fixed-clock%virt_13m_ck fixed-clock%]@virt_19200000_ck fixed-clock%$virt_26000000_ck fixed-clock%virt_38_4m_ck fixed-clock%Idpll4_ck@d00ti,omap3-dpll-per-clock!! D 0dpll4_m2_ck@d48ti,divider-clock5? H@#dpll4_m2x2_mul_ckfixed-factor-clock#Wb$dpll4_m2x2_ck@d00ti,gate-clock$ l%omap_96m_alwon_fckfixed-factor-clock%Wb,dpll3_ck@d00ti,omap3-dpll-core-clock!! @ 0dpll3_m3_ck@1140ti,divider-clock5@@&dpll3_m3x2_mul_ckfixed-factor-clock&Wb'dpll3_m3x2_ck@d00ti,gate-clock'  l(emu_core_alwon_ckfixed-factor-clock(Wbesys_altclk fixed-clock%1mcbsp_clks fixed-clock%dpll3_m2_ck@d40ti,divider-clock5 @@core_ckfixed-factor-clockWb)dpll1_fck@940ti,divider-clock)5 @@*dpll1_ck@904ti,omap3-dpll-clock!*  $ @ 4dpll1_x2_ckfixed-factor-clockWb+dpll1_x2m2_ck@944ti,divider-clock+5 D@?cm_96m_fckfixed-factor-clock,Wb-omap_96m_fck@d40 ti,mux-clock-! @Hdpll4_m3_ck@e40ti,divider-clock5 @@.dpll4_m3x2_mul_ckfixed-factor-clock.Wb/dpll4_m3x2_ck@d00ti,gate-clock/ l0omap_54m_fck@d40 ti,mux-clock01 @;cm_96m_d2_fckfixed-factor-clock-Wb2omap_48m_fck@d40 ti,mux-clock21 @3omap_12m_fckfixed-factor-clock3WbJdpll4_m4_ck@e40ti,divider-clock5@@4dpll4_m4x2_mul_ckti,fixed-factor-clock45dpll4_m4x2_ck@d00ti,gate-clock5 ldpll4_m5_ck@f40ti,divider-clock5?@@6dpll4_m5x2_mul_ckti,fixed-factor-clock67dpll4_m5x2_ck@d00ti,gate-clock7 lmdpll4_m6_ck@1140ti,divider-clock5?@@8dpll4_m6x2_mul_ckfixed-factor-clock8Wb9dpll4_m6x2_ck@d00ti,gate-clock9 l:emu_per_alwon_ckfixed-factor-clock:Wbfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock) p<clkout2_src_mux_ck@d70ti,composite-mux-clock)!-; p=clkout2_src_ckti,composite-clock<=>sys_clkout2@d70ti,divider-clock>5@ pmpu_ckfixed-factor-clock?Wb@arm_fck@924ti,divider-clock@ $5emu_mpu_alwon_ckfixed-factor-clock@Wbgl3_ick@a40ti,divider-clock)5 @@Al4_ick@a40ti,divider-clockA5 @@Brm_ick@c40ti,divider-clockB5 @@gpt10_gate_fck@a00ti,composite-gate-clock!  Dgpt10_mux_fck@a40ti,composite-mux-clockC! @Egpt10_fckti,composite-clockDEgpt11_gate_fck@a00ti,composite-gate-clock!  Fgpt11_mux_fck@a40ti,composite-mux-clockC! @Ggpt11_fckti,composite-clockFGcore_96m_fckfixed-factor-clockHWbmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock  mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock3WbImcspi4_fck@a00ti,wait-gate-clockI mcspi3_fck@a00ti,wait-gate-clockI mcspi2_fck@a00ti,wait-gate-clockI mcspi1_fck@a00ti,wait-gate-clockI uart2_fck@a00ti,wait-gate-clockI uart1_fck@a00ti,wait-gate-clockI  core_12m_fckfixed-factor-clockJWbKhdq_fck@a00ti,wait-gate-clockK core_l3_ickfixed-factor-clockAWbLsdrc_ick@a10ti,wait-gate-clockL gpmc_fckfixed-factor-clockLWbcore_l4_ickfixed-factor-clockBWbMmmchs2_ick@a10ti,omap3-interface-clockM mmchs1_ick@a10ti,omap3-interface-clockM hdq_ick@a10ti,omap3-interface-clockM mcspi4_ick@a10ti,omap3-interface-clockM mcspi3_ick@a10ti,omap3-interface-clockM mcspi2_ick@a10ti,omap3-interface-clockM mcspi1_ick@a10ti,omap3-interface-clockM i2c3_ick@a10ti,omap3-interface-clockM i2c2_ick@a10ti,omap3-interface-clockM i2c1_ick@a10ti,omap3-interface-clockM uart2_ick@a10ti,omap3-interface-clockM uart1_ick@a10ti,omap3-interface-clockM  gpt11_ick@a10ti,omap3-interface-clockM  gpt10_ick@a10ti,omap3-interface-clockM  mcbsp5_ick@a10ti,omap3-interface-clockM  mcbsp1_ick@a10ti,omap3-interface-clockM  omapctrl_ick@a10ti,omap3-interface-clockM dss_tv_fck@e00ti,gate-clock;dss_96m_fck@e00ti,gate-clockHdss2_alwon_fck@e00ti,gate-clock!dummy_ck fixed-clock%gpt1_gate_fck@c00ti,composite-gate-clock! Ngpt1_mux_fck@c40ti,composite-mux-clockC! @Ogpt1_fckti,composite-clockNOaes2_ick@a10ti,omap3-interface-clockM wkup_32k_fckfixed-factor-clockCWbPgpio1_dbck@c00ti,gate-clockP sha12_ick@a10ti,omap3-interface-clockM wdt2_fck@c00ti,wait-gate-clockP wdt2_ick@c10ti,omap3-interface-clockQ wdt1_ick@c10ti,omap3-interface-clockQ gpio1_ick@c10ti,omap3-interface-clockQ omap_32ksync_ick@c10ti,omap3-interface-clockQ gpt12_ick@c10ti,omap3-interface-clockQ gpt1_ick@c10ti,omap3-interface-clockQ per_96m_fckfixed-factor-clock,Wb per_48m_fckfixed-factor-clock3WbRuart3_fck@1000ti,wait-gate-clockR gpt2_gate_fck@1000ti,composite-gate-clock!Sgpt2_mux_fck@1040ti,composite-mux-clockC!@Tgpt2_fckti,composite-clockSTgpt3_gate_fck@1000ti,composite-gate-clock!Ugpt3_mux_fck@1040ti,composite-mux-clockC!@Vgpt3_fckti,composite-clockUVgpt4_gate_fck@1000ti,composite-gate-clock!Wgpt4_mux_fck@1040ti,composite-mux-clockC!@Xgpt4_fckti,composite-clockWXgpt5_gate_fck@1000ti,composite-gate-clock!Ygpt5_mux_fck@1040ti,composite-mux-clockC!@Zgpt5_fckti,composite-clockYZgpt6_gate_fck@1000ti,composite-gate-clock![gpt6_mux_fck@1040ti,composite-mux-clockC!@\gpt6_fckti,composite-clock[\gpt7_gate_fck@1000ti,composite-gate-clock!]gpt7_mux_fck@1040ti,composite-mux-clockC!@^gpt7_fckti,composite-clock]^gpt8_gate_fck@1000ti,composite-gate-clock! _gpt8_mux_fck@1040ti,composite-mux-clockC!@`gpt8_fckti,composite-clock_`gpt9_gate_fck@1000ti,composite-gate-clock! agpt9_mux_fck@1040ti,composite-mux-clockC!@bgpt9_fckti,composite-clockabper_32k_alwon_fckfixed-factor-clockCWbcgpio6_dbck@1000ti,gate-clockcgpio5_dbck@1000ti,gate-clockcgpio4_dbck@1000ti,gate-clockcgpio3_dbck@1000ti,gate-clockcgpio2_dbck@1000ti,gate-clockc wdt3_fck@1000ti,wait-gate-clockc per_l4_ickfixed-factor-clockBWbdgpio6_ick@1010ti,omap3-interface-clockdgpio5_ick@1010ti,omap3-interface-clockdgpio4_ick@1010ti,omap3-interface-clockdgpio3_ick@1010ti,omap3-interface-clockdgpio2_ick@1010ti,omap3-interface-clockd wdt3_ick@1010ti,omap3-interface-clockd uart3_ick@1010ti,omap3-interface-clockd uart4_ick@1010ti,omap3-interface-clockdgpt9_ick@1010ti,omap3-interface-clockd gpt8_ick@1010ti,omap3-interface-clockd gpt7_ick@1010ti,omap3-interface-clockdgpt6_ick@1010ti,omap3-interface-clockdgpt5_ick@1010ti,omap3-interface-clockdgpt4_ick@1010ti,omap3-interface-clockdgpt3_ick@1010ti,omap3-interface-clockdgpt2_ick@1010ti,omap3-interface-clockdmcbsp2_ick@1010ti,omap3-interface-clockdmcbsp3_ick@1010ti,omap3-interface-clockdmcbsp4_ick@1010ti,omap3-interface-clockdmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock!efg@hemu_src_ckti,clkdm-gate-clockhipclk_fck@1140ti,divider-clocki5@@pclkx2_fck@1140ti,divider-clocki5@@atclk_fck@1140ti,divider-clocki5@@traceclk_src_fck@1140 ti,mux-clock!efg@jtraceclk_fck@1140ti,divider-clockj 5@@secure_32k_fck fixed-clock%kgpt12_fckfixed-factor-clockkWbwdt1_fckfixed-factor-clockkWbsecurity_l4_ick2fixed-factor-clockBWblaes1_ick@a14ti,omap3-interface-clockl rng_ick@a14ti,omap3-interface-clockl sha11_ick@a14ti,omap3-interface-clockl des1_ick@a14ti,omap3-interface-clockl cam_mclk@f00ti,gate-clockmcam_ick@f10!ti,omap3-no-wait-interface-clockBcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockAWbnpka_ick@a14ti,omap3-interface-clockn icr_ick@a10ti,omap3-interface-clockM des2_ick@a10ti,omap3-interface-clockM mspro_ick@a10ti,omap3-interface-clockM mailboxes_ick@a10ti,omap3-interface-clockM ssi_l4_ickfixed-factor-clockBWbusr1_fck@c00ti,wait-gate-clock! sr2_fck@c00ti,wait-gate-clock! sr_l4_ickfixed-factor-clockBWbdpll2_fck@40ti,divider-clock)5@@odpll2_ck@4ti,omap3-dpll-clock!o$@4pdpll2_m2_ck@44ti,divider-clockp5D@qiva2_ck@0ti,wait-gate-clockqmodem_fck@a00ti,omap3-interface-clock! sad2d_ick@a10ti,omap3-interface-clockA mad2d_ick@a18ti,omap3-interface-clockA mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock" rssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock" @$sssi_ssr_fck_3430es2ti,composite-clockrstssi_sst_fck_3430es2fixed-factor-clocktWbhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockL ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocku usim_gate_fck@c00ti,composite-gate-clockH  sys_d2_ckfixed-factor-clock!Wbwomap_96m_d2_fckfixed-factor-clockHWbxomap_96m_d4_fckfixed-factor-clockHWbyomap_96m_d8_fckfixed-factor-clockHWbzomap_96m_d10_fckfixed-factor-clockHWb {dpll5_m2_d4_ckfixed-factor-clockvWb|dpll5_m2_d8_ckfixed-factor-clockvWb}dpll5_m2_d16_ckfixed-factor-clockvWb~dpll5_m2_d20_ckfixed-factor-clockvWbusim_mux_fck@c40ti,composite-mux-clock(!wxyz{|}~ @@usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockQ  dpll5_ck@d04ti,omap3-dpll-clock!!  $ L 4dpll5_m2_ck@d50ti,divider-clock5 P@vsgx_gate_fck@b00ti,composite-gate-clock) core_d3_ckfixed-factor-clock)Wbcore_d4_ckfixed-factor-clock)Wbcore_d6_ckfixed-factor-clock)Wbomap_192m_alwon_fckfixed-factor-clock%Wbcore_d2_ckfixed-factor-clock)Wbsgx_mux_fck@b40ti,composite-mux-clock - @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockA cpefuse_fck@a08ti,gate-clock! ts_fck@a08ti,gate-clockC usbtll_fck@a08ti,wait-gate-clockv usbtll_ick@a18ti,omap3-interface-clockM mmchs3_ick@a10ti,omap3-interface-clockM mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockBusbhost_120m_fck@1400ti,gate-clockvusbhost_48m_fck@1400ti,dss-gate-clock3usbhost_ick@1410ti,omap3-dss-interface-clockBclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainidpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainpd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscPfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#   Lick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma  &`gpio@48310000ti,omap3-gpioH1gpio13EU gpio@49050000ti,omap3-gpioIgpio2EU gpio@49052000ti,omap3-gpioI gpio3EU gpio@49054000ti,omap3-gpioI@ gpio4EU  gpio@49056000ti,omap3-gpioI`!gpio5EU gpio@49058000ti,omap3-gpioI"gpio6EU serial@4806a000ti,omap3-uartH aH12txrxuart1%lserial@4806c000ti,omap3-uartHaI34txrxuart2%lserial@49020000ti,omap3-uartIaJn56txrxuart3%li2c@48070000 ti,omap3-i2cH8+i2c1%'@twl@48H  ti,twl4030 udefaultpowerti,twl4030-power-idlertcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1vccregulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' 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smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuopp1-125000000 EsY@ L Zopp2-250000000 E沀 Lg8g8g8 Z kopp3-500000000 Ee LOOO Zopp4-550000000 E U Ltxtxtx Zopp5-600000000 E#F Lppp Zopp6-720000000 E*T Lppp Z wthermal-zonescpu-thermal   N  tripscpu_alert 8 passivecpu_crit _  criticalcooling-mapsmap0   regulator-vddvarioregulator-fixed vddvarioregulator-vdd33aregulator-fixedvdd33amemory@80000000|memorygpio_keys gpio-keysudefault key_enterenter   'key_f1f1   ;'key_f2f2   <'key_f3f3   ='key_f4f4   >'key_leftleft   i'key_rightright   j'key_upup   g'key_downdown   l'backlightgpio-backlight   regulator-lcd-3v3regulator-fixedlcd_3v32Z2Z pdisplaysharp,ls037v7dw01lcd  ( 5  B Nportendpoint   compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,use_poweroffbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyvcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourcependown-gpioti,dual-voltpbias-supplyvmmc-supplybus-widthstatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addresslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-pslabelmultipointnum-epsram-bitsinterface-typeusb-phypowerremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpioslinux,codedefault-onstartup-delay-uspower-supplyenvdd-supplyenable-gpiosreset-gpiosmode-gpios