8( *"ti,omap3-evmti,omap3430ti,omap3 +7TI OMAP35XX EVM (TMDSEVM3530)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/displaycpus+cpu@0arm,cortex-a8|cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 5Spdefault~pinmux_twl4030_pinsApinmux_dss_dpi_pins2pinmux_mmc1_pinsP "$&pinmux_mmc2_pinsP(*,.02468:pinmux_uart3_pinsnAppinmux_ehci_port_select_pinspinmux_hsusb2_pins0      pinmux_wl12xx_gpioPNpinmux_smsc911x_pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock  mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 5Spinmux_twl4030_vpins pinmux_dss_dpi_pins10   target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss !ick+ H ` aes1@0 ti,omap3-aesP.  3txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss !ick+ H P aes2@0 ti,omap3-aesP.AB3txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock=Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockMpX#sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockozdpll3_m2x2_ckfixed-factor-clock oz"dpll4_x2_ckfixed-factor-clock!ozcorex2_fckfixed-factor-clock"oz$wkup_l4_ickfixed-factor-clock#ozScorex2_d3_fckfixed-factor-clock$ozcorex2_d5_fckfixed-factor-clock$ozclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock=omap_32k_fck fixed-clock=Evirt_12m_ck fixed-clock=virt_13m_ck fixed-clock=]@virt_19200000_ck fixed-clock=$virt_26000000_ck fixed-clock=virt_38_4m_ck fixed-clock=Idpll4_ck@d00ti,omap3-dpll-per-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!M? HX%dpll4_m2x2_mul_ckfixed-factor-clock%oz&dpll4_m2x2_ck@d00ti,gate-clock& 'omap_96m_alwon_fckfixed-factor-clock'oz.dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0dpll3_m3_ck@1140ti,divider-clockM@X(dpll3_m3x2_mul_ckfixed-factor-clock(oz)dpll3_m3x2_ck@d00ti,gate-clock)  *emu_core_alwon_ckfixed-factor-clock*ozgsys_altclk fixed-clock=3mcbsp_clks fixed-clock= dpll3_m2_ck@d40ti,divider-clockM @X core_ckfixed-factor-clock oz+dpll1_fck@940ti,divider-clock+M @X,dpll1_ck@904ti,omap3-dpll-clock#,  $ @ 4dpll1_x2_ckfixed-factor-clockoz-dpll1_x2m2_ck@944ti,divider-clock-M DXAcm_96m_fckfixed-factor-clock.oz/omap_96m_fck@d40 ti,mux-clock/# @Jdpll4_m3_ck@e40ti,divider-clock!M @X0dpll4_m3x2_mul_ckfixed-factor-clock0oz1dpll4_m3x2_ck@d00ti,gate-clock1 2omap_54m_fck@d40 ti,mux-clock23 @=cm_96m_d2_fckfixed-factor-clock/oz4omap_48m_fck@d40 ti,mux-clock43 @5omap_12m_fckfixed-factor-clock5ozLdpll4_m4_ck@e40ti,divider-clock!M@X6dpll4_m4x2_mul_ckti,fixed-factor-clock67dpll4_m4x2_ck@d00ti,gate-clock7 dpll4_m5_ck@f40ti,divider-clock!M?@X8dpll4_m5x2_mul_ckti,fixed-factor-clock89dpll4_m5x2_ck@d00ti,gate-clock9 odpll4_m6_ck@1140ti,divider-clock!M?@X:dpll4_m6x2_mul_ckfixed-factor-clock:oz;dpll4_m6x2_ck@d00ti,gate-clock; <emu_per_alwon_ckfixed-factor-clock<ozhclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock+ p>clkout2_src_mux_ck@d70ti,composite-mux-clock+#/= p?clkout2_src_ckti,composite-clock>?@sys_clkout2@d70ti,divider-clock@M@ pmpu_ckfixed-factor-clockAozBarm_fck@924ti,divider-clockB $Memu_mpu_alwon_ckfixed-factor-clockBozil3_ick@a40ti,divider-clock+M @XCl4_ick@a40ti,divider-clockCM @XDrm_ick@c40ti,divider-clockDM @Xgpt10_gate_fck@a00ti,composite-gate-clock#  Fgpt10_mux_fck@a40ti,composite-mux-clockE# @Ggpt10_fckti,composite-clockFGgpt11_gate_fck@a00ti,composite-gate-clock#  Hgpt11_mux_fck@a40ti,composite-mux-clockE# @Igpt11_fckti,composite-clockHIcore_96m_fckfixed-factor-clockJozmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock    mcbsp1_gate_fck@a00ti,composite-gate-clock    core_48m_fckfixed-factor-clock5ozKmcspi4_fck@a00ti,wait-gate-clockK mcspi3_fck@a00ti,wait-gate-clockK mcspi2_fck@a00ti,wait-gate-clockK mcspi1_fck@a00ti,wait-gate-clockK uart2_fck@a00ti,wait-gate-clockK uart1_fck@a00ti,wait-gate-clockK  core_12m_fckfixed-factor-clockLozMhdq_fck@a00ti,wait-gate-clockM core_l3_ickfixed-factor-clockCozNsdrc_ick@a10ti,wait-gate-clockN gpmc_fckfixed-factor-clockNozcore_l4_ickfixed-factor-clockDozOmmchs2_ick@a10ti,omap3-interface-clockO mmchs1_ick@a10ti,omap3-interface-clockO hdq_ick@a10ti,omap3-interface-clockO mcspi4_ick@a10ti,omap3-interface-clockO mcspi3_ick@a10ti,omap3-interface-clockO mcspi2_ick@a10ti,omap3-interface-clockO mcspi1_ick@a10ti,omap3-interface-clockO i2c3_ick@a10ti,omap3-interface-clockO i2c2_ick@a10ti,omap3-interface-clockO i2c1_ick@a10ti,omap3-interface-clockO uart2_ick@a10ti,omap3-interface-clockO uart1_ick@a10ti,omap3-interface-clockO  gpt11_ick@a10ti,omap3-interface-clockO  gpt10_ick@a10ti,omap3-interface-clockO  mcbsp5_ick@a10ti,omap3-interface-clockO  mcbsp1_ick@a10ti,omap3-interface-clockO  omapctrl_ick@a10ti,omap3-interface-clockO dss_tv_fck@e00ti,gate-clock=dss_96m_fck@e00ti,gate-clockJdss2_alwon_fck@e00ti,gate-clock#dummy_ck fixed-clock=gpt1_gate_fck@c00ti,composite-gate-clock# Pgpt1_mux_fck@c40ti,composite-mux-clockE# @Qgpt1_fckti,composite-clockPQaes2_ick@a10ti,omap3-interface-clockO wkup_32k_fckfixed-factor-clockEozRgpio1_dbck@c00ti,gate-clockR sha12_ick@a10ti,omap3-interface-clockO wdt2_fck@c00ti,wait-gate-clockR wdt2_ick@c10ti,omap3-interface-clockS wdt1_ick@c10ti,omap3-interface-clockS gpio1_ick@c10ti,omap3-interface-clockS omap_32ksync_ick@c10ti,omap3-interface-clockS gpt12_ick@c10ti,omap3-interface-clockS gpt1_ick@c10ti,omap3-interface-clockS per_96m_fckfixed-factor-clock.ozper_48m_fckfixed-factor-clock5ozTuart3_fck@1000ti,wait-gate-clockT gpt2_gate_fck@1000ti,composite-gate-clock#Ugpt2_mux_fck@1040ti,composite-mux-clockE#@Vgpt2_fckti,composite-clockUVgpt3_gate_fck@1000ti,composite-gate-clock#Wgpt3_mux_fck@1040ti,composite-mux-clockE#@Xgpt3_fckti,composite-clockWXgpt4_gate_fck@1000ti,composite-gate-clock#Ygpt4_mux_fck@1040ti,composite-mux-clockE#@Zgpt4_fckti,composite-clockYZgpt5_gate_fck@1000ti,composite-gate-clock#[gpt5_mux_fck@1040ti,composite-mux-clockE#@\gpt5_fckti,composite-clock[\gpt6_gate_fck@1000ti,composite-gate-clock#]gpt6_mux_fck@1040ti,composite-mux-clockE#@^gpt6_fckti,composite-clock]^gpt7_gate_fck@1000ti,composite-gate-clock#_gpt7_mux_fck@1040ti,composite-mux-clockE#@`gpt7_fckti,composite-clock_`gpt8_gate_fck@1000ti,composite-gate-clock# agpt8_mux_fck@1040ti,composite-mux-clockE#@bgpt8_fckti,composite-clockabgpt9_gate_fck@1000ti,composite-gate-clock# cgpt9_mux_fck@1040ti,composite-mux-clockE#@dgpt9_fckti,composite-clockcdper_32k_alwon_fckfixed-factor-clockEozegpio6_dbck@1000ti,gate-clockegpio5_dbck@1000ti,gate-clockegpio4_dbck@1000ti,gate-clockegpio3_dbck@1000ti,gate-clockegpio2_dbck@1000ti,gate-clocke wdt3_fck@1000ti,wait-gate-clocke per_l4_ickfixed-factor-clockDozfgpio6_ick@1010ti,omap3-interface-clockfgpio5_ick@1010ti,omap3-interface-clockfgpio4_ick@1010ti,omap3-interface-clockfgpio3_ick@1010ti,omap3-interface-clockfgpio2_ick@1010ti,omap3-interface-clockf wdt3_ick@1010ti,omap3-interface-clockf uart3_ick@1010ti,omap3-interface-clockf uart4_ick@1010ti,omap3-interface-clockfgpt9_ick@1010ti,omap3-interface-clockf gpt8_ick@1010ti,omap3-interface-clockf gpt7_ick@1010ti,omap3-interface-clockfgpt6_ick@1010ti,omap3-interface-clockfgpt5_ick@1010ti,omap3-interface-clockfgpt4_ick@1010ti,omap3-interface-clockfgpt3_ick@1010ti,omap3-interface-clockfgpt2_ick@1010ti,omap3-interface-clockfmcbsp2_ick@1010ti,omap3-interface-clockfmcbsp3_ick@1010ti,omap3-interface-clockfmcbsp4_ick@1010ti,omap3-interface-clockfmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock#ghi@jemu_src_ckti,clkdm-gate-clockjkpclk_fck@1140ti,divider-clockkM@Xpclkx2_fck@1140ti,divider-clockkM@Xatclk_fck@1140ti,divider-clockkM@Xtraceclk_src_fck@1140 ti,mux-clock#ghi@ltraceclk_fck@1140ti,divider-clockl M@Xsecure_32k_fck fixed-clock=mgpt12_fckfixed-factor-clockmozwdt1_fckfixed-factor-clockmozsecurity_l4_ick2fixed-factor-clockDoznaes1_ick@a14ti,omap3-interface-clockn rng_ick@a14ti,omap3-interface-clockn sha11_ick@a14ti,omap3-interface-clockn des1_ick@a14ti,omap3-interface-clockn cam_mclk@f00ti,gate-clockocam_ick@f10!ti,omap3-no-wait-interface-clockDcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockCozppka_ick@a14ti,omap3-interface-clockp icr_ick@a10ti,omap3-interface-clockO des2_ick@a10ti,omap3-interface-clockO mspro_ick@a10ti,omap3-interface-clockO mailboxes_ick@a10ti,omap3-interface-clockO ssi_l4_ickfixed-factor-clockDozwsr1_fck@c00ti,wait-gate-clock# sr2_fck@c00ti,wait-gate-clock# sr_l4_ickfixed-factor-clockDozdpll2_fck@40ti,divider-clock+M@Xqdpll2_ck@4ti,omap3-dpll-clock#q$@4rdpll2_m2_ck@44ti,divider-clockrMDXsiva2_ck@0ti,wait-gate-clocksmodem_fck@a00ti,omap3-interface-clock# sad2d_ick@a10ti,omap3-interface-clockC mad2d_ick@a18ti,omap3-interface-clockC mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock$ tssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock$ @$ ussi_ssr_fck_3430es2ti,composite-clocktuvssi_sst_fck_3430es2fixed-factor-clockvoz hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockN ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockw  usim_gate_fck@c00ti,composite-gate-clockJ  sys_d2_ckfixed-factor-clock#ozyomap_96m_d2_fckfixed-factor-clockJozzomap_96m_d4_fckfixed-factor-clockJoz{omap_96m_d8_fckfixed-factor-clockJoz|omap_96m_d10_fckfixed-factor-clockJoz }dpll5_m2_d4_ckfixed-factor-clockxoz~dpll5_m2_d8_ckfixed-factor-clockxozdpll5_m2_d16_ckfixed-factor-clockxozdpll5_m2_d20_ckfixed-factor-clockxozusim_mux_fck@c40ti,composite-mux-clock(#yz{|}~ @Xusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockS  dpll5_ck@d04ti,omap3-dpll-clock##  $ L 4dpll5_m2_ck@d50ti,divider-clockM PXxsgx_gate_fck@b00ti,composite-gate-clock+ core_d3_ckfixed-factor-clock+ozcore_d4_ckfixed-factor-clock+ozcore_d6_ckfixed-factor-clock+ozomap_192m_alwon_fckfixed-factor-clock'ozcore_d2_ckfixed-factor-clock+ozsgx_mux_fck@b40ti,composite-mux-clock / @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockC cpefuse_fck@a08ti,gate-clock# ts_fck@a08ti,gate-clockE usbtll_fck@a08ti,wait-gate-clockx usbtll_ick@a18ti,omap3-interface-clockO mmchs3_ick@a10ti,omap3-interface-clockO mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockDusbhost_120m_fck@1400ti,gate-clockxusbhost_48m_fck@1400ti,dss-gate-clock5usbhost_ick@1410ti,omap3-dss-interface-clockDclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainkdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainrd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscRfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  !Nick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma &1 >`gpio@48310000ti,omap3-gpioH1gpio1K]m gpio@49050000ti,omap3-gpioIgpio2]m en-usb2-port-hogyenable usb2 portgpio@49052000ti,omap3-gpioI gpio3]m gpio@49054000ti,omap3-gpioI@ gpio4]m gpio@49056000ti,omap3-gpioI`!gpio5]m gpio@49058000ti,omap3-gpioI"gpio6]m serial@4806a000ti,omap3-uartH HR.123txrxuart1=lserial@4806c000ti,omap3-uartHIJ.343txrxuart2=lserial@49020000ti,omap3-uartIJn.563txrxuart3=lpdefault~i2c@48070000 ti,omap3-i2cH8+i2c1='@twl@48H  ti,twl4030 pdefault~rtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2usb_1v8w@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio]m en_on_board_gpio_61yen_hsusb2_clktwl4030-usbti,twl4030-usb  &/pwmti,twl4030-pwm:pwmledti,twl4030-pwmled:pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadEU8h  7 Smadcti,twl4030-madcupower1ti,twl4030-power-omap3-evmti,twl4030-power-idlei2c@48072000 ti,omap3-i2cH 9+i2c2=i2c@48060000 ti,omap3-i2cH=+i2c3=tvp5146@5c ti,tvp5146m2\mailbox@48094000ti,omap3-mailboxmailboxH @mbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@.#$%&'()* 3tx0rx0tx1rx1tx2rx2tx3rx3tsc2046@0 ti,tsc2046B@@#,(<LW  espi@4809a000ti,omap2-mcspiH B+mcspi2 .+,-.3tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 .3tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4.FG3tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1r.=>3txrxSpdefault~mmc@480b4000ti,omap3-hsmmcH @Vmmc2./03txrxV.+pdefault~wlcore@2 ti,wl1271N irqwakeupImmc@480ad000ti,omap3-hsmmcH ^mmc3.MN3txrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1. 3txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss!ick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone.!"3txrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetone.3txrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4.3txrxfck' disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5.3txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1.E3rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' !fckick+ H18Ltimer@0ti,omap3430-timerfck%WfvEtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' !fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' !fckick+ H0@timer@0ti,omap3430-timer_Wusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn.3rxtx+ ]m 0,ethernet@gpmcsmsc,lan9221smsc,lan91154N\n(--x :KQKk  pdefault~nand@0,0ti,omap2-nand   micron,mt29f2g16abdhc  #bch8 3N\,n,",(6@RR(+usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs D O W  ` o wusb2-phy* 2dss@48050000 ti,omap3-dssHokay dss_corefck+  pdefault~ dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfckportendpoint   ssi-controller@48058000 ti,omap3-ssissiokayHHsysgddGgdd_mpu+ v   ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+ 5Spdefault~ pinmux_ehci_phy_pinspinmux_hsusb2_2_pins0   "  isp@480bc000 ti,omap3-ispH H | l ports+bandgap@48002524H%$ti,omap34xx-bandgap target-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuopp1-125000000 sY@  opp2-250000000 沀 g8g8g8  opp3-500000000 e OOO opp4-550000000 U txtxtx opp5-600000000 #F ppp opp6-720000000 *T ppp  thermal-zonescpu-thermal * @ NN  [tripscpu_alert k8 wpassivecpu_crit k_ w criticalcooling-mapsmap0  regulator-vddvarioregulator-fixed vddvarioregulator-vdd33aregulator-fixedvdd33ahsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z m p hsusb2_phyusb-nop-xceiv /pdefault~leds gpio-ledsledb omap3evm::ledb  default-onwl12xx_vmmcregulator-fixedvwl1271w@w@ m p  pdefault~backlightgpio-backlight  regulator-lcd-3v3regulator-fixedlcd_3v32Z2Z p mdisplaysharp,ls037v7dw01 lcd    $ portendpoint  memory@80000000|memory compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-lowline-nameinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyvcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourcependown-gpioti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardinterrupt-namesref-clock-frequencystatus#iommu-cellsti,#tlb-entriesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addresslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicestartup-delay-usenable-active-highreset-gpioslabellinux,default-triggervin-supplydefault-onpower-supplyenvdd-supplyenable-gpiosmode-gpios