s8( 9compulab,omap3-cm-t3530ti,omap3430ti,omap34xxti,omap3 +7CompuLab CM-T3530chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8scpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+,Jpinmux_uart3_pinsgnppinmux_mmc1_pins0gpinmux_green_led_pinsgpinmux_dss_dpi_pins_commong pinmux_dss_dpi_pins_cm_t35x0g pinmux_ads7846_pinsgpinmux_mcspi1_pins gpinmux_i2c1_pinsgpinmux_mcbsp2_pins g pinmux_smsc1_pinsgjpinmux_hsusb0_pins`grtvxz|~pinmux_twl4030_pinsgApinmux_mmc2_pinsPg(*,.02468:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap{pbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clock mcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+,Jpinmux_twl4030_vpins gtarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H ` aes1@0 ti,omap3-aesP   txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P aes2@0 ti,omap3-aesP ABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock,p7!sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockNYdpll3_m2x2_ckfixed-factor-clockNY dpll4_x2_ckfixed-factor-clockNYcorex2_fckfixed-factor-clock NY"wkup_l4_ickfixed-factor-clock!NYQcorex2_d3_fckfixed-factor-clock"NYcorex2_d5_fckfixed-factor-clock"NYclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockCvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-clock!! D 0dpll4_m2_ck@d48ti,divider-clock,? H7#dpll4_m2x2_mul_ckfixed-factor-clock#NY$dpll4_m2x2_ck@d00ti,gate-clock$ c%omap_96m_alwon_fckfixed-factor-clock%NY,dpll3_ck@d00ti,omap3-dpll-core-clock!! @ 0dpll3_m3_ck@1140ti,divider-clock,@7&dpll3_m3x2_mul_ckfixed-factor-clock&NY'dpll3_m3x2_ck@d00ti,gate-clock'  c(emu_core_alwon_ckfixed-factor-clock(NYesys_altclk fixed-clock1mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock, @7core_ckfixed-factor-clockNY)dpll1_fck@940ti,divider-clock), @7*dpll1_ck@904ti,omap3-dpll-clock!*  $ @ 4dpll1_x2_ckfixed-factor-clockNY+dpll1_x2m2_ck@944ti,divider-clock+, D7?cm_96m_fckfixed-factor-clock,NY-omap_96m_fck@d40 ti,mux-clock-! @Hdpll4_m3_ck@e40ti,divider-clock, @7.dpll4_m3x2_mul_ckfixed-factor-clock.NY/dpll4_m3x2_ck@d00ti,gate-clock/ c0omap_54m_fck@d40 ti,mux-clock01 @;cm_96m_d2_fckfixed-factor-clock-NY2omap_48m_fck@d40 ti,mux-clock21 @3omap_12m_fckfixed-factor-clock3NYJdpll4_m4_ck@e40ti,divider-clock,@74dpll4_m4x2_mul_ckti,fixed-factor-clock4y5dpll4_m4x2_ck@d00ti,gate-clock5 cdpll4_m5_ck@f40ti,divider-clock,?@76dpll4_m5x2_mul_ckti,fixed-factor-clock6y7dpll4_m5x2_ck@d00ti,gate-clock7 cmdpll4_m6_ck@1140ti,divider-clock,?@78dpll4_m6x2_mul_ckfixed-factor-clock8NY9dpll4_m6x2_ck@d00ti,gate-clock9 c:emu_per_alwon_ckfixed-factor-clock:NYfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock) p<clkout2_src_mux_ck@d70ti,composite-mux-clock)!-; p=clkout2_src_ckti,composite-clock<=>sys_clkout2@d70ti,divider-clock>,@ pmpu_ckfixed-factor-clock?NY@arm_fck@924ti,divider-clock@ $,emu_mpu_alwon_ckfixed-factor-clock@NYgl3_ick@a40ti,divider-clock), @7Al4_ick@a40ti,divider-clockA, @7Brm_ick@c40ti,divider-clockB, @7gpt10_gate_fck@a00ti,composite-gate-clock!  Dgpt10_mux_fck@a40ti,composite-mux-clockC! @Egpt10_fckti,composite-clockDEgpt11_gate_fck@a00ti,composite-gate-clock!  Fgpt11_mux_fck@a40ti,composite-mux-clockC! @Ggpt11_fckti,composite-clockFGcore_96m_fckfixed-factor-clockHNYmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock  mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock3NYImcspi4_fck@a00ti,wait-gate-clockI mcspi3_fck@a00ti,wait-gate-clockI mcspi2_fck@a00ti,wait-gate-clockI mcspi1_fck@a00ti,wait-gate-clockI uart2_fck@a00ti,wait-gate-clockI uart1_fck@a00ti,wait-gate-clockI  core_12m_fckfixed-factor-clockJNYKhdq_fck@a00ti,wait-gate-clockK core_l3_ickfixed-factor-clockANYLsdrc_ick@a10ti,wait-gate-clockL gpmc_fckfixed-factor-clockLNYcore_l4_ickfixed-factor-clockBNYMmmchs2_ick@a10ti,omap3-interface-clockM mmchs1_ick@a10ti,omap3-interface-clockM hdq_ick@a10ti,omap3-interface-clockM mcspi4_ick@a10ti,omap3-interface-clockM mcspi3_ick@a10ti,omap3-interface-clockM mcspi2_ick@a10ti,omap3-interface-clockM mcspi1_ick@a10ti,omap3-interface-clockM i2c3_ick@a10ti,omap3-interface-clockM i2c2_ick@a10ti,omap3-interface-clockM i2c1_ick@a10ti,omap3-interface-clockM uart2_ick@a10ti,omap3-interface-clockM uart1_ick@a10ti,omap3-interface-clockM  gpt11_ick@a10ti,omap3-interface-clockM  gpt10_ick@a10ti,omap3-interface-clockM  mcbsp5_ick@a10ti,omap3-interface-clockM  mcbsp1_ick@a10ti,omap3-interface-clockM  omapctrl_ick@a10ti,omap3-interface-clockM dss_tv_fck@e00ti,gate-clock;dss_96m_fck@e00ti,gate-clockHdss2_alwon_fck@e00ti,gate-clock!dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock! Ngpt1_mux_fck@c40ti,composite-mux-clockC! @Ogpt1_fckti,composite-clockNOaes2_ick@a10ti,omap3-interface-clockM wkup_32k_fckfixed-factor-clockCNYPgpio1_dbck@c00ti,gate-clockP sha12_ick@a10ti,omap3-interface-clockM wdt2_fck@c00ti,wait-gate-clockP wdt2_ick@c10ti,omap3-interface-clockQ wdt1_ick@c10ti,omap3-interface-clockQ gpio1_ick@c10ti,omap3-interface-clockQ omap_32ksync_ick@c10ti,omap3-interface-clockQ gpt12_ick@c10ti,omap3-interface-clockQ gpt1_ick@c10ti,omap3-interface-clockQ per_96m_fckfixed-factor-clock,NY per_48m_fckfixed-factor-clock3NYRuart3_fck@1000ti,wait-gate-clockR gpt2_gate_fck@1000ti,composite-gate-clock!Sgpt2_mux_fck@1040ti,composite-mux-clockC!@Tgpt2_fckti,composite-clockSTgpt3_gate_fck@1000ti,composite-gate-clock!Ugpt3_mux_fck@1040ti,composite-mux-clockC!@Vgpt3_fckti,composite-clockUVgpt4_gate_fck@1000ti,composite-gate-clock!Wgpt4_mux_fck@1040ti,composite-mux-clockC!@Xgpt4_fckti,composite-clockWXgpt5_gate_fck@1000ti,composite-gate-clock!Ygpt5_mux_fck@1040ti,composite-mux-clockC!@Zgpt5_fckti,composite-clockYZgpt6_gate_fck@1000ti,composite-gate-clock![gpt6_mux_fck@1040ti,composite-mux-clockC!@\gpt6_fckti,composite-clock[\gpt7_gate_fck@1000ti,composite-gate-clock!]gpt7_mux_fck@1040ti,composite-mux-clockC!@^gpt7_fckti,composite-clock]^gpt8_gate_fck@1000ti,composite-gate-clock! _gpt8_mux_fck@1040ti,composite-mux-clockC!@`gpt8_fckti,composite-clock_`gpt9_gate_fck@1000ti,composite-gate-clock! agpt9_mux_fck@1040ti,composite-mux-clockC!@bgpt9_fckti,composite-clockabper_32k_alwon_fckfixed-factor-clockCNYcgpio6_dbck@1000ti,gate-clockcgpio5_dbck@1000ti,gate-clockcgpio4_dbck@1000ti,gate-clockcgpio3_dbck@1000ti,gate-clockcgpio2_dbck@1000ti,gate-clockc wdt3_fck@1000ti,wait-gate-clockc per_l4_ickfixed-factor-clockBNYdgpio6_ick@1010ti,omap3-interface-clockdgpio5_ick@1010ti,omap3-interface-clockdgpio4_ick@1010ti,omap3-interface-clockdgpio3_ick@1010ti,omap3-interface-clockdgpio2_ick@1010ti,omap3-interface-clockd wdt3_ick@1010ti,omap3-interface-clockd uart3_ick@1010ti,omap3-interface-clockd uart4_ick@1010ti,omap3-interface-clockdgpt9_ick@1010ti,omap3-interface-clockd gpt8_ick@1010ti,omap3-interface-clockd gpt7_ick@1010ti,omap3-interface-clockdgpt6_ick@1010ti,omap3-interface-clockdgpt5_ick@1010ti,omap3-interface-clockdgpt4_ick@1010ti,omap3-interface-clockdgpt3_ick@1010ti,omap3-interface-clockdgpt2_ick@1010ti,omap3-interface-clockdmcbsp2_ick@1010ti,omap3-interface-clockdmcbsp3_ick@1010ti,omap3-interface-clockdmcbsp4_ick@1010ti,omap3-interface-clockdmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock!efg@hemu_src_ckti,clkdm-gate-clockhipclk_fck@1140ti,divider-clocki,@7pclkx2_fck@1140ti,divider-clocki,@7atclk_fck@1140ti,divider-clocki,@7traceclk_src_fck@1140 ti,mux-clock!efg@jtraceclk_fck@1140ti,divider-clockj ,@7secure_32k_fck fixed-clockkgpt12_fckfixed-factor-clockkNYwdt1_fckfixed-factor-clockkNYsecurity_l4_ick2fixed-factor-clockBNYlaes1_ick@a14ti,omap3-interface-clockl rng_ick@a14ti,omap3-interface-clockl sha11_ick@a14ti,omap3-interface-clockl des1_ick@a14ti,omap3-interface-clockl cam_mclk@f00ti,gate-clockmcam_ick@f10!ti,omap3-no-wait-interface-clockBcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockANYnpka_ick@a14ti,omap3-interface-clockn icr_ick@a10ti,omap3-interface-clockM des2_ick@a10ti,omap3-interface-clockM mspro_ick@a10ti,omap3-interface-clockM mailboxes_ick@a10ti,omap3-interface-clockM ssi_l4_ickfixed-factor-clockBNYusr1_fck@c00ti,wait-gate-clock! sr2_fck@c00ti,wait-gate-clock! sr_l4_ickfixed-factor-clockBNYdpll2_fck@40ti,divider-clock),@7odpll2_ck@4ti,omap3-dpll-clock!o$@4pdpll2_m2_ck@44ti,divider-clockp,D7qiva2_ck@0ti,wait-gate-clockqmodem_fck@a00ti,omap3-interface-clock! sad2d_ick@a10ti,omap3-interface-clockA mad2d_ick@a18ti,omap3-interface-clockA mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock" rssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock" @$sssi_ssr_fck_3430es2ti,composite-clockrstssi_sst_fck_3430es2fixed-factor-clocktNY hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockL ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocku usim_gate_fck@c00ti,composite-gate-clockH  sys_d2_ckfixed-factor-clock!NYwomap_96m_d2_fckfixed-factor-clockHNYxomap_96m_d4_fckfixed-factor-clockHNYyomap_96m_d8_fckfixed-factor-clockHNYzomap_96m_d10_fckfixed-factor-clockHNY {dpll5_m2_d4_ckfixed-factor-clockvNY|dpll5_m2_d8_ckfixed-factor-clockvNY}dpll5_m2_d16_ckfixed-factor-clockvNY~dpll5_m2_d20_ckfixed-factor-clockvNYusim_mux_fck@c40ti,composite-mux-clock(!wxyz{|}~ @7usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockQ  dpll5_ck@d04ti,omap3-dpll-clock!!  $ L 4dpll5_m2_ck@d50ti,divider-clock, P7vsgx_gate_fck@b00ti,composite-gate-clock) core_d3_ckfixed-factor-clock)NYcore_d4_ckfixed-factor-clock)NYcore_d6_ckfixed-factor-clock)NYomap_192m_alwon_fckfixed-factor-clock%NYcore_d2_ckfixed-factor-clock)NYsgx_mux_fck@b40ti,composite-mux-clock - @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockA cpefuse_fck@a08ti,gate-clock! ts_fck@a08ti,gate-clockC usbtll_fck@a08ti,wait-gate-clockv usbtll_ick@a18ti,omap3-interface-clockM mmchs3_ick@a10ti,omap3-interface-clockM mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockBusbhost_120m_fck@1400ti,gate-clockvusbhost_48m_fck@1400ti,dss-gate-clock3usbhost_ick@1410ti,omap3-dss-interface-clockBclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainidpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainpd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscPfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Lick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma  `gpio@48310000ti,omap3-gpioH1gpio1*<Lgpio@49050000ti,omap3-gpioIgpio2<Lgpio@49052000ti,omap3-gpioI gpio3<Lgpio@49054000ti,omap3-gpioI@ gpio4<Lgpio@49056000ti,omap3-gpioI`!gpio5<Lgpio@49058000ti,omap3-gpioI"gpio6<Lserial@4806a000ti,omap3-uartH XH 12txrxuart1lserial@4806c000ti,omap3-uartHXI 34txrxuart2lserial@49020000ti,omap3-uartIXJ 56txrxuart3lldefaultzi2c@48070000 ti,omap3-i2cH8+i2c1ldefaultzat24@50 atmel,24c02Ptwl@48H  ti,twl4030ldefaultzaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@ regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio<Ltwl4030-usbti,twl4030-usb pwmti,twl4030-pwm pwmledti,twl4030-pwmled pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad($;0iglj. madcti,twl4030-madcHi2c@48072000 ti,omap3-i2cH 9+i2c2i2c@48060000 ti,omap3-i2cH=+i2c3mailbox@48094000ti,omap3-mailboxmailboxH @Zfxmbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@ #$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3ldefaultzads7846@0ldefaultz ti,ads7846`   , <Lspi@4809a000ti,omap2-mcspiH B+mcspi2  +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3  tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4 FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1Z =>txrxgldefaultzt~mmc@480b4000ti,omap3-hsmmcH @Vmmc2 /0txrxldefaultz~tmmc@480ad000ti,omap3-hsmmcH ^mmc3 MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1  txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone !"txrxfckickokayldefaultzmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetone txrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4 txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5 txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1 Erxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1timer@0ti,omap3430-timerfck%-=Ctarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5Ttimer@4903a000ti,omap3430-timerI*timer6Ttimer@4903c000ti,omap3430-timerI+timer7Ttimer@4903e000ti,omap3430-timerI,timer8aTtimer@49040000ti,omap3430-timerI-timer9atimer@48086000ti,omap3430-timerH`.timer10atimer@48088000ti,omap3430-timerH/timer11atarget-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_nusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ~ehci-phy ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn rxtx+<L ,nand@0,0ti,omap2-nand  swx x2AxTxguZZH<xxZ+partition@00xloaderpartition@800000ubootpartition@2600000uboot environment&partition@2a00000linux*@partition@6a00000rootfsjethernet@gpmcsmsc,lan9221smsc,lan91156A[ 2AT(-g-uxuKKldefaultz  usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs   ldefaultz  ' /usb2-phy 92dss@48050000 ti,omap3-dssHokay dss_corefck+ldefaultz  dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfck ? portendpoint K  [ssi-controller@48058000 ti,omap3-ssissiokayHHsysgddGgdd_mpu+ t  ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+,Jisp@480bc000 ti,omap3-ispH H | g{l nports+bandgap@48002524H%$ti,omap34xx-bandgap ztarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpu{opp1-125000000 sY@  opp2-250000000 沀 g8g8g8  opp3-500000000 e OOO opp4-550000000 U txtxtx opp5-600000000 #F ppp opp6-720000000 *T ppp  thermal-zonescpu-thermal   N  tripscpu_alert 8 zpassivecpu_crit _  zcriticalcooling-mapsmap0 % *memory@80000000smemoryleds gpio-ledsldefaultzledb 0cm-t3x:green 9 ?heartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z Uphsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z Uphsusb1_phyusb-nop-xceiv fhsusb2_phyusb-nop-xceiv fads7846-regregulator-fixed ads7846-reg2Z2Zsvideo-connectorsvideo-connector0tvportendpoint K soundti,omap-twl4030 rcm-t35 {regulator-vddvarioregulator-fixed vddvario regulator-vdd33aregulator-fixedvdd33a regulator-mmc2-sdio-resetregulator-fixedregulator-mmc2-sdio-reset2Z2Z   compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0pagesizebci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplynon-removablecap-power-off-cardstatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpioslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspregulator-always-onenable-active-high