A8=(,=`Technologic Systems TS-4800#!technologic,imx51-ts4800fsl,imx51chosen",/soc/bus@70000000/serial@73fbc000aliases$8/soc/bus@80000000/ethernet@83fec000 B/soc/bus@70000000/gpio@73f84000 H/soc/bus@70000000/gpio@73f88000 N/soc/bus@70000000/gpio@73f8c000 T/soc/bus@70000000/gpio@73f90000Z/soc/bus@80000000/i2c@83fc8000_/soc/bus@80000000/i2c@83fc40001d/soc/bus@70000000/spba-bus@70000000/mmc@700040001i/soc/bus@70000000/spba-bus@70000000/mmc@700080001n/soc/bus@70000000/spba-bus@70000000/mmc@700200001s/soc/bus@70000000/spba-bus@70000000/mmc@70024000"x/soc/bus@70000000/serial@73fbc000"/soc/bus@70000000/serial@73fc00004/soc/bus@70000000/spba-bus@70000000/serial@7000c0001/soc/bus@70000000/spba-bus@70000000/spi@70010000/soc/bus@80000000/spi@83fac000/soc/bus@80000000/spi@83fc0000tz-interrupt-controller@e0000000!fsl,imx51-tzicfsl,tzic@clocksckil !fixed-clockckih1 !fixed-clockXckih2 !fixed-clockwosc !fixed-clockn6cpuscpu@0cpu!arm,cortex-a8$cpupB@ ' 5,pmu!arm,cortex-a8-pmu>OMusbphy0!usb-nop-xceivK main_clkZcapture-subsystem!fsl,imx-capture-subsystemedisplay-subsystem!fsl,imx-display-subsystemesoc !simple-bus>ksram@1ffe0000 !mmio-sramgpu@30000000!amd,imageon-200.1amd,imageon0rkgsl_3d0_reg_memoryO  |kgsl_3d0_irqcore_clkmem_iface_clkipu@40000000!fsl,imx51-ipu@ O ;n= busdi0di1port@0port@1port@2endpointport@3endpointbus@70000000!fsl,aips-bussimple-buspkspba-bus@70000000!fsl,spba-bussimple-buspkmmc@70004000!fsl,imx51-esdhcp@@O,G ipgahbperokaydefault     mmc@70008000!fsl,imx51-esdhcp@O-H ipgahbper disabledserial@7000c000!fsl,imx51-uartfsl,imx21-uartp@O! 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8  DL lt px t| x  t! l @i2c2grp0Ul\ @p` @fpgaicgrpUlcdgrpU    $$((04,,LTPXbacklightgrpUuart1grp0U( ,uart2grp0U8( <,uart3grp0U  weimgrpUtx`dppwm@73fb4000^!fsl,imx51-pwmfsl,imx27-pwms@@%&ipgperO=defaultokaypwm@73fb8000^!fsl,imx51-pwmfsl,imx27-pwms@'(ipgperO^serial@73fbc000!fsl,imx51-uartfsl,imx21-uarts@Oipgperokaydefaultserial@73fc0000!fsl,imx51-uartfsl,imx21-uarts@O ipgperokaydefaultreset-controller@73fd0000!fsl,imx51-srcs@OKiccm@73fd4000!fsl,imx51-ccms@@OGHbus@80000000!fsl,aips-bussimple-busŀkbridge@83f00000!fsl,imx51-aipstzŃ`efuse@83f98000#!fsl,imx51-iimfsl,imx27-iimsysconŃ@OEktigerp@83fa0000!fsl,imx51-tigerpŃ(owire@83fa4000 !fsl,imx51-owirefsl,imx21-owireŃ@@OX disabledspi@83fac000!fsl,imx51-ecspiŃ@O%56ipgper disabledsdma@83fb0000!fsl,imx51-sdmafsl,imx35-sdmaŃ@O8ipgahbvimx/sdma/sdma-imx51.bin spi@83fc0000!fsl,imx51-cspifsl,imx35-cspiŃ@O&77ipgper disabledi2c@83fc4000!fsl,imx51-i2cfsl,imx21-i2cŃ@@O?#okaydefaultrtc@68 !st,m41t00hi2c@83fc8000!fsl,imx51-i2cfsl,imx21-i2cŃ@O>" disabledssi@83fcc000!fsl,imx51-ssifsl,imx21-ssiŃ@O0 ipgbaud   rxtx disabledaudmux@83fd0000"!fsl,imx51-audmuxfsl,imx31-audmuxŃ@audmux disabledm4if@83fd8000!fsl,imx51-m4ifŃweim@83fda000!fsl,imx51-weimŃ9`kokaydefaultfpga@0 !simple-busa  $ ksyscon@10000!sysconsimple-mfd=wdt!technologic,ts4800-wdttouchscreen@12000!technologic,ts4800-ts  fpga-irqc@15000!technologic,ts4800-irqcPdefault>O can@1a000!technologic,sja1000>On6nand@83fdb000!fsl,imx51-nandŃO< disabledpata@83fe0000!fsl,imx51-patafsl,imx27-pataŃ@OF disabledssi@83fe8000!fsl,imx51-ssifsl,imx21-ssiŃ@O`2 ipgbaud  . /rxtx disabledethernet@83fec000!fsl,imx51-fecfsl,imx27-fecŃ@OW*** ipgahbptpokaydefaultmii  vpu@83ff4000!fsl,imx51-vpucnm,codahx4Ń@O @?perahbcrypto@83ff8000"!fsl,imx53-saharafsl,imx51-saharaŃ@Oipgahbmemory@90000000memoryŐregulator-backlight!regulator-fixeddefault$enable_lcd_reg32ZK2Z c hbacklight!pwm-backlight {3disp1!fsl,imx-parallel-displayrgb24defaultdisplay-timings800x480p60P 2F2 "2portendpoint #address-cells#size-cellsmodelcompatiblestdout-pathethernet0gpio0gpio1gpio2gpio3i2c0i2c1mmc0mmc1mmc2mmc3serial0serial1serial2spi0spi1spi2interrupt-controller#interrupt-cellsregphandle#clock-cellsclock-frequencydevice_typeclock-latencyclocksclock-namesoperating-pointsvoltage-toleranceinterrupt-parentinterrupts#phy-cellsportsrangesreg-namesinterrupt-namesresetsremote-endpointstatuspinctrl-namespinctrl-0cd-gpioswp-gpiosbus-width#sound-dai-cellsdmasdma-namesfsl,fifo-depthfsl,usbmiscfsl,usbphydr_mode#index-cellsgpio-controller#gpio-cellsfsl,pins#pwm-cells#reset-cells#dma-cellsfsl,sdma-ram-script-namefsl,weim-cs-timingreg-io-widthsysconnxp,tx-output-confignxp,external-clock-frequencyphy-modephy-reset-gpiosphy-reset-durationiramregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highpwmsbrightness-levelsdefault-brightness-levelpower-supplyinterface-pix-fmtnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-len