A^8=(=HMarvell Armada 385 AMC8!marvell,a385-db-amcmarvell,armada385marvell,armada380aliases,/soc/internal-regs/gpio@181002/soc/internal-regs/gpio@18140 8/soc/internal-regs/serial@12000 @/soc/internal-regs/serial@12100"H/soc/internal-regs/ethernet@70000"R/soc/internal-regs/ethernet@30000\/soc/spi@10680pmu!arm,cortex-a9-pmuasoc"!marvell,armada380-mbussimple-busu bootrom!marvell,bootrom  devbus-bootcs!marvell,mvebu-devbus / disableddevbus-cs0!marvell,mvebu-devbus > disableddevbus-cs1!marvell,mvebu-devbus = disableddevbus-cs2!marvell,mvebu-devbus ; disableddevbus-cs3!marvell,mvebu-devbus  7 disabledinternal-regs !simple-bussdramc@1400#!marvell,armada-xp-sdram-controllercache-controller@8000!arm,pl310-cache-scu@c000!arm,cortex-a9-scuXtimer@c200!arm,cortex-a9-global-timer  ; timer@c600!arm,cortex-a9-twd-timer  ; interrupt-controller@d000!arm,cortex-a9-gicFWli2c@11000+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c  ;okaytdefaulti2c@11100+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c  ; disabledserial@12000!!marvell,armada-38x-uartns16550a  ; okaytdefaultserial@12100!!marvell,armada-38x-uartns16550a! ;  disabledpinctrl@18000 !marvell,mv88f6820-pinctrlge-rgmii-pins-0Dmpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17ge0l ge-rgmii-pins-1Hmpp21mpp27mpp28mpp29mpp30mpp31mpp32mpp37mpp38mpp39mpp40mpp41ge1i2c-pins-0 mpp2mpp3i2c0lmdio-pins mpp4mpp5gel ref-clk-pins-0mpp45refl ref-clk-pins-1mpp46refspi-pins-0mpp22mpp23mpp24mpp25spi0spi-pins-1mpp56mpp57mpp58mpp59spi1lnand-pinsNmpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32devnand-rbmpp41nanduart-pins-0 mpp0mpp1ua0luart-pins-1 mpp19mpp20ua1sdhci-pins<mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59sd0sata-pins-0mpp20sata0sata-pins-1mpp19sata1sata-pins-2mpp47sata2sata-pins-3mpp44sata3gpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio@ gpiopwm WF0;5678gpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio@@ gpiopwmWF0;:;<=system-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controllerclock-gating-control@18220 !marvell,armada-380-gating-clock lphy@18300!marvell,armada-380-comphy comphyconf`phy@0phy@1phy@2phy@3phy@4phy@5mvebu-sar@18600!marvell,armada-380-core-clocklmbus-controller@20000!marvell,mbus-controller Plinterrupt-controller@20a00 !marvell,mpic pXFW ;ltimer@203001!marvell,armada-380-timermarvell,armada-xp-timer0@0Pa      nbclkfixedwatchdog@20300!marvell,armada-380-wdt4`   nbclkfixed a@ cpurst@20800!marvell,armada-370-cpu-resetmpcore-soc-ctrl@20d20#!marvell,armada-380-mpcore-soc-ctrl lcoherency-fabric@21010$!marvell,armada-380-coherency-fabricpmsu@22000!marvell,armada-380-pmsu ethernet@70000!marvell,armada-370-neta@a,&Hokaytdefault :  >rgmii-idethernet@30000!marvell,armada-370-neta@a  disabledethernet@34000!marvell,armada-370-neta@@a okay: >sgmiiusb@58000!marvell,orion-ehci ;okayxor@60800)!marvell,armada-380-xormarvell,orion-xor okayxor00 ;GUxor01 ;GU`xor@60900)!marvell,armada-380-xormarvell,orion-xor  okayxor10 ;AGUxor11 ;BGU`mdio@72004!marvell,orion-mdio tdefault ethernet-phy@1l ethernet-phy@0l crypto@90000!marvell,armada-38x-crypto regs;  cesa0cesa1cesaz0cesaz1nrtc@a3800!marvell,armada-380-rtc 8   rtcrtc-soc ;sata@a8000!marvell,armada-380-ahci  ; disabledbm@c8000!marvell,armada-380-neta-bm   disabledsata@e0000!marvell,armada-380-ahci  ; disabledclock@e4250!!marvell,armada-380-corediv-clockBP nandlthermal@e8078!marvell,armada380-thermal@x@pokaynand-controller@d0000"!marvell,armada370-nand-controller T ;Tokaynand@0pxa3xx_nand-0partitions!fixed-partitionspartition@0@usersdhci@d8000!marvell,armada-380-sdhcisdhcimbusconf-sdio3  T ; disabledusb3@f0000!marvell,armada-380-xhci@@@ ;  disabledusb3@f8000!marvell,armada-380-xhci@@ ;  disabledsa-sram0 !mmio-sram  lsa-sram1 !mmio-sram  lbm-bppi !mmio-sram    disabledlspi@10600)!marvell,armada-380-spimarvell,orion-spi P ; disabledspi@10680)!marvell,armada-380-spimarvell,orion-spi P ;?okaytdefaultspi-flash@0!jedec,spi-nor partitions!fixed-partitionspartition@0u-bootpartition@100000 u-boot-envpcie!marvell,armada-370-pcieokay+pci7BP  @@  pcie@1,0+pciL _intxaF@Bo`okayinterrupt-controllerWFlpcie@2,0+pciL _intxa!F@Bo` disabledinterrupt-controllerWFlpcie@3,0+pciL@ _intxaFF@Bo` disabledinterrupt-controllerWFlpcie@4,0+pciL  _intxaGF@Bo` disabledinterrupt-controllerWFlclocksmainpll !fixed-clock;loscillator !fixed-clock1-lcpusmarvell,armada-380-smpcpu@0+cpu!arm,cortex-a9cpu@1+cpu!arm,cortex-a9chosenserial0:115200n8memory+memory #address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1ethernet0ethernet1spi1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandlepinctrl-namespinctrl-0reg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpiosgpio-controller#gpio-cells#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphyphy-modedmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memclock-output-nameslabelnand-rbnand-on-flash-bbtmrvl,clk-delay-cyclesno-memory-wccell-indexspi-max-frequencym25p,fast-readdevice_typemsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequencyenable-methodstdout-path