f8`P(I`,mecer,xms6rockchip,rk32297Mecer Xtreme Mini S6aliases=/pinctrl/gpio@11110000C/pinctrl/gpio@11120000I/pinctrl/gpio@11130000O/pinctrl/gpio@11140000U/serial@11010000]/serial@11020000e/serial@11030000m/spi@11090000r/mmc@30000000w/mmc@30010000|/mmc@30020000cpuscpu@f00cpu,arm,cortex-a7@pscicpu@f01cpu,arm,cortex-a7pscicpu@f02cpu,arm,cortex-a7pscicpu@f03cpu,arm,cortex-a7psciopp-table-0,operating-points-v2opp-408000000Q~@"opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxopp-1296000000M?d7opp-1392000000R<opp-1464000000WB\arm-pmu,arm,cortex-a7-pmu0.LMNO9psci,arm,psci-1.0arm,psci-0.2smctimer,arm,armv7-timerL0.   pn6oscillator ,fixed-clockpn6xin24m+display-subsystem,rockchip,display-subsystem i2s1@100b0000(,rockchip,rk3228-i2srockchip,rk3066-i2s @ .i2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(,rockchip,rk3228-i2srockchip,rk3066-i2s @ .i2s_clki2s_hclkP txrx disabledspdif@100d0000,rockchip,rk3228-spdif  .S mclkhclk txdefault  disabledi2s2@100e0000(,rockchip,rk3228-i2srockchip,rk3066-i2s@ .i2s_clki2s_hclkR txrx disabledsyscon@11000000&,rockchip,rk3228-grfsysconsimple-mfd,io-domains",rockchip,rk3228-io-voltage-domainokay  power-controller!,rockchip,rk3228-power-controller 2power-domain@48 power-domain@5 power-domain@6 power-domain@7  power-domain@8 usb2phy@760,rockchip,rk3228-usb2phy` phyclk usb480m_phy0okayHotg-port$.;<=%otg-bvalidotg-idlinestate5okay@Ghost-port .> %linestate5okay@Iusb2phy@800,rockchip,rk3228-usb2phy phyclk usb480m_phy1okayJotg-port .D %linestate5okay@Khost-port .E %linestate5okay@Lserial@11010000,snps,dw-apb-uart .7pn6MUbaudclkapb_pclkdefault KU disabledserial@11020000,snps,dw-apb-uart .8pn6NVbaudclkapb_pclkdefaultKU disabledserial@11030000,snps,dw-apb-uart .9pn6OWbaudclkapb_pclkdefaultKUokayefuse@11040000,rockchip,rk3228-efuse G pclk_efuseid@7cpu_leakage@17i2c@11050000,rockchip,rk3228-i2c .$i2cLdefault disabledi2c@11060000,rockchip,rk3228-i2c .%i2cMdefault disabledi2c@11070000,rockchip,rk3228-i2c .&i2cNdefault  disabledi2c@11080000,rockchip,rk3228-i2c .'i2cOdefault! disabledspi@11090000,rockchip,rk3228-spi  .1ARspiclkapb_pclkdefault"#$%& disabledwatchdog@110a0000 ,rockchip,rk3228-wdtsnps,dw-wdt  .(b disabledpwm@110b0000,rockchip,rk3288-pwm b^default' disabledpwm@110b0010,rockchip,rk3288-pwm b^default(okayXpwm@110b0020,rockchip,rk3288-pwm b^default)okayYpwm@110b0030,rockchip,rk3288-pwm 0b^default* disabledtimer@110c0000,,rockchip,rk3228-timerrockchip,rk3288-timer  .+ a+ pclktimerclock-controller@110e0000,rockchip,rk3228-cru+xin24mm,zHkb$#g0,eррxhррxhdma-controller@110f0000,arm,pl330arm,primecell@. apb_pclk thermal-zonescpu-thermald-tripscpu_alert0ppassive.cpu_alert1$passive/cpu_crit_ criticalcooling-mapsmap0.0map1/0tsadc@11150000,rockchip,rk3228-tsadc .:HXtsadcapb_pclkHW -tsadc-apbinitdefaultsleep091C0Mcsokayz-hdmi-phy@12030000,rockchip,rk3228-hdmi-phym+sysclkrefoclkrefpclk hdmiphy_phy5okay8gpu@20000000",rockchip,rk3228-maliarm,mali-400 H.%gpgpmmupp0ppmmu0pp1ppmmu1 buscore2~okay3video-codec@20020000(,rockchip,rk3228-vpurockchip,rk3399-vpu .   %vepuvdpu aclkhclk42iommu@20020800,rockchip,iommu  .  aclkiface24video-codec@20030000*,rockchip,rk3228-vdecrockchip,rk3399-vdec  . axiahbcabaccore52iommu@20030480,rockchip,iommu @ @ . aclkiface25vop@20050000,rockchip,rk3228-vop  . aclk_vopdclk_vophclk_vopdef -axiahbdclk62okayport endpoint@07<iommu@20053f00,rockchip,iommu ? .  aclkiface2okay6rga@20060000(,rockchip,rk3228-rgarockchip,rk3288-rga  .!aclkhclksclk2kmn -coreaxiahbiommu@20070800,rockchip,iommu  . aclkiface2okayhdmi@200a0000,rockchip,rk3228-dw-hdmi U .#8l{iahbisfrcecdefault 9:;`-hdmi8hdmim,okayportsport@0endpoint<7port@1mmc@300000000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@ .  Drvbiuciuciu-driveciu-sampledefault =>?okaymmc@300100000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@ .  Eswbiuciuciu-driveciu-sampledefault @ABokay'8ECP^mmc@300200000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@ .p<4`k<4` Guybiuciuciu-driveciu-sampleydefault DEFS-resetokayPusb@300400002,rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc20 .otgotg@ G usb2-phyokayusb@30080000 ,generic-ehci0 . HIusbokayusb@300a0000 ,generic-ohci0  . HIusbokayusb@300c0000 ,generic-ehci0  . JKusbokayusb@300e0000 ,generic-ohci0 . JKusbokayusb@30100000 ,generic-ehci0 .B JLusbokayusb@30120000 ,generic-ohci0 .C JLusbokayethernet@30200000,rockchip,rk3228-gmac0  .%macirq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 -stmmacethm,okay|outputMrmii@Nmdio,snps,dwmac-mdioethernet-phy@04,ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22?Mqos@31030080,rockchip,rk3228-qossyscon1 qos@31030100,rockchip,rk3228-qossyscon1 qos@31030180,rockchip,rk3228-qossyscon1 qos@31030200,rockchip,rk3228-qossyscon1 qos@31040000,rockchip,rk3228-qossyscon1 qos@31050000,rockchip,rk3228-qossyscon1 qos@31060000,rockchip,rk3228-qossyscon1 qos@31070000,rockchip,rk3228-qossyscon1 qos@31070080,rockchip,rk3228-qossyscon1 interrupt-controller@32010000 ,arm,gic-400 22 2@ 2`  . pinctrl,rockchip,rk3228-pinctrlm,(gpio@11110000,rockchip,gpio-bank .3@/?gpio@11120000,rockchip,gpio-bank .4A/?gpio@11130000,rockchip,gpio-bank .5B/?Tgpio@11140000,rockchip,gpio-bank .6C/?Spcfg-pull-upKRpcfg-pull-downXQpcfg-pull-nonegPpcfg-pull-none-drv-12mat Osdmmcsdmmc-clkO=sdmmc-cmdO>sdmmc-bus4@OOOO?sdiosdio-clkO@sdio-cmdOAsdio-bus4@OOOOBemmcemmc-clkPDemmc-cmdPEemmc-bus8PPPPPPPPFgmacrgmii-pinsP PPOOOO O OPPPP PPrmii-pinsP PPOO OPPPPphy-pins PPhdmihdmi-hpdQ:hdmii2c-xfer PP9hdmi-cecP;i2c0i2c0-xfer PPi2c1i2c1-xfer PPi2c2i2c2-xfer PP i2c3i2c3-xfer PP!spi0spi0-clk R"spi0-cs0R%spi0-tx R#spi0-rx R$spi0-cs1 R&spi1spi1-clkRspi1-cs0Rspi1-rxRspi1-txRspi1-cs1Ri2s1i2s1-busP P P P PPPPP pwm0pwm0-pinP'pwm1pwm1-pinP(pwm2pwm2-pin P)pwm3pwm3-pin P*spdifspdif-txP tsadcotp-pinP0otp-outP1uart0uart0-xfer PPuart0-ctsPuart0-rtsPuart1uart1-xfer  P Puart1-ctsPuart1-rts Puart2uart2-xfer RPuart21-xfer  R Puart2-ctsPuart2-rtsPusbhost-vbus-drvPUmemory@60000000memory`@dc-12v-regulator,regulator-fixeddc_12vWext_gmac ,fixed-clockpsY@ ext_gmacpower-led ,gpio-ledsled-0 Sonsdio-pwrseq,mmc-pwrseq-simple TTCvcc-host-regulator,regulator-fixed )SdefaultU vcc_host.Vvcc-phy-regulator,regulator-fixedvcc_phyw@w@.Nvcc-sys-regulator,regulator-fixedvcc_sysLK@LK@.WVvccio-1v8-regulator,regulator-fixed vccio_1v8w@w@.Vvccio-3v3-regulator,regulator-fixed vccio_3v32Z2Z.V vdd-arm-regulator,pwm-regulator9Xa>Vvdd_arm~\vdd-log-regulator,pwm-regulator9Ya>Vvdd_logB@ 3 #address-cells#size-cellsinterrupt-parentcompatiblemodelgpio0gpio1gpio2gpio3serial0serial1serial2spi0mmc0mmc1mmc2device_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksenable-methodcpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsclock-namesdmasdma-namespinctrl-namespinctrl-0statusvccio1-supplyvccio2-supplyvccio4-supply#power-domain-cellspm_qosinterrupt-names#phy-cellsphy-supplyreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-rates#dma-cellsarm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-modepower-domainsmali-supplyiommus#iommu-cellsremote-endpointassigned-clock-parentsphysphy-namesfifo-depthcap-mmc-highspeeddisable-wpbus-widthcap-sd-highspeedcap-sdio-irqmmc-pwrseqnon-removablevqmmc-supplymax-frequencyrockchip,default-sample-phasedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeclock_in_outphy-handlephy-modephy-is-integratedinterrupt-controller#interrupt-cellsrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltgpiosdefault-statereset-gpiosenable-active-highgpiovin-supplypwmspwm-supply