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xr5f-dma-memory@a0000000shared-dma-poolA x'r5f-memory@a0100000shared-dma-poolA x(r5f-dma-memory@a1000000shared-dma-poolA x*r5f-memory@a1100000shared-dma-poolA x+r5f-dma-memory@a2000000shared-dma-poolA x>r5f-memory@a2100000shared-dma-poolA x?r5f-dma-memory@a3000000shared-dma-poolA xAr5f-memory@a3100000shared-dma-poolA xBr5f-dma-memory@a4000000shared-dma-poolA xEr5f-memory@a4100000shared-dma-poolA xFr5f-dma-memory@a5000000shared-dma-poolA xHr5f-memory@a5100000shared-dma-poolA xIr5f-dma-memory@a6000000shared-dma-poolA xLr5f-memory@a6100000shared-dma-poolA xMr5f-dma-memory@a7000000shared-dma-poolA xOr5f-memory@a7100000shared-dma-poolA xPc71-dma-memory@a8000000shared-dma-poolA xSc71-memory@a8100000shared-dma-poolA xTc71-dma-memory@a9000000shared-dma-poolA xVc71-memory@a9100000shared-dma-poolA xWc71-dma-memory@aa000000shared-dma-poolA xZc71-memory@aa100000shared-dma-poolA x[c71-dma-memory@ab000000shared-dma-poolA x]c71-memory@ab100000shared-dma-poolA x^regulator-vusb-main5v0regulator-fixed vusb-main5v0LK@LK@gregulator-vsys5v0regulator-fixed vsys_5v0LK@LK@ gjregulator-vsys3v3regulator-fixed vsys_3v32Z2Z gregulator-sdregulator-fixed vdd_mmc12Z2Z   h2regulator-tlv71033regulator-gpio tlv71033defaultiw@2Z j k1w@2Z3regulator-dp0-pwrregulator-fixeddp0-pwr2Z2Zdefaultl k mconnector-dp0 dp-connectorDP0 Lfull-size mportendpoint nbconnector-hdmihdmi-connectorhdmiLadefaulto p kportendpoint qtbridge-dvi ti,tfp410defaultr  ports"1port@0Aendpoint s eport@1Aendpoint tq modelcompatibleinterrupt-parent#address-cells#size-cellscpuregdevice_typeenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandlecache-levelcache-unifiedinterruptsbootph-allrangesti,host-idmbox-namesmboxesreg-names#power-domain-cells#clock-cells#reset-cells#mbox-cellsstatus#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,intr-trigger-typeinterrupt-controller#interrupt-cellsti,sciti,sci-dev-idti,interrupt-ranges#phy-cellsclocksclock-namesassigned-clocksassigned-clock-parentspower-domainsti,timer-pwmcurrent-speedpinctrl-namespinctrl-0gpio-controller#gpio-cellsti,ngpioti,davinci-gpio-unbankedclock-frequencysystem-power-controllerti,primary-pmicbuck12-supplybuck3-supplybuck4-supplybuck5-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-oninterrupt-namesbosch,mram-cfgdma-coherentdma-rangesti,num-ringsti,sci-rm-range-gp-ringsmsi-parent#dma-cellsti,ringaccti,sci-rm-range-tchanti,sci-rm-range-rchanti,sci-rm-range-rflowdmasdma-namesti,mac-onlylabelti,syscon-efusephysphy-modephy-handlebus_freqti,rx-internal-delayti,fifo-depthti,min-output-impedanceinterrupts-extendedti,cpts-ext-ts-inputsti,cpts-periodic-outputsti,cluster-modeti,sci-proc-idsresetsfirmware-nameti,atcm-enableti,btcm-enableti,loczramamemory-region#thermal-sensor-cellsassigned-clock-rates#io-channel-cellscdns,fifo-depthcdns,fifo-widthcdns,trigger-addressti,esm-pinsbootph-pre-ram#mux-control-cellsmux-reg-masksidle-statessocionext,synquacer-pre-itsmsi-controller#msi-cellsgpio-line-namesbus-widthti,otap-del-sel-legacyti,otap-del-sel-mmc-hsti,otap-del-sel-ddr52ti,otap-del-sel-hs200ti,otap-del-sel-hs400ti,itap-del-sel-legacyti,itap-del-sel-mmc-hsti,strobe-selti,clkbuf-selti,trm-icpmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vnon-removableti,driver-strength-ohmdisable-wpti,otap-del-sel-sd-hsti,otap-del-sel-sdr12ti,otap-del-sel-sdr25ti,otap-del-sel-sdr50ti,otap-del-sel-sdr104ti,otap-del-sel-ddr50ti,itap-del-sel-sd-hsti,itap-del-sel-sdr12ti,itap-del-sel-sdr25ti,itap-del-sel-ddr50sdhci-caps-maskno-1-8-vvmmc-supplyvqmmc-supplynum-lanesreset-namescdns,num-lanescdns,phy-typeti,unmapped-event-sources#hwlock-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-rxti,mbox-txfreq-table-hzphy-namesremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisstdout-pathserial0serial1serial2mmc0mmc1i2c0i2c3ethernet0no-mapvin-supplyenable-active-highgpiosdp-pwr-supplyddc-i2c-bushpd-gpiospowerdown-gpiosti,deskewpclk-sample