8( dradxa,rock-5brockchip,rk3588 +7Radxa ROCK 5 Model Baliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  cpu@100cpuarm,cortex-a55psci"5 a q~@@ cpu@200cpuarm,cortex-a55psci"5 a q~@@ cpu@300cpuarm,cortex-a55psci"5 a q~@@ cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@500cpuarm,cortex-a76psci"5 a q~@@cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@700cpuarm,cortex-a76psci"5 a q~@@ idle-statespscicpu-sleeparm,idle-state#4Kd\xl l2-cache-l0caches@} l2-cache-l1caches@}l2-cache-l2caches@}l2-cache-l3caches@}l2-cache-b0caches@}l2-cache-b1caches@}l2-cache-b2caches@}l2-cache-b3caches@}l3-cachecaches0@}firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splldisplay-subsystemrockchip,display-subsystemtimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmemusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5 usb*okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5 usb*okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5  !usb*okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5  !usb*okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&1ref_clksuspend_clkbus_clkutmipipe=host " usb3-phy Eutmi_wideN4Um*okaysyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXisyscon@fd58c000rockchip,rk3588-sys-grfsysconX(syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ )syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ*syscon@fd5b0000rockchip,rk3588-php-grfsyscon[%syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@8000rockchip,rk3588-usb2phyNophyapb51phyclk usb480m_phy2*okayhost-port*okay#syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@c000rockchip,rk3588-usb2phyNp phyapb51phyclk usb480m_phy3*okay host-port*okay$!syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р  %i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts 1i2cpclk&$default+*okayregulator@42rockchip,rk8602B2Ovdd_cpu_big0_s0^rdp#regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602C2Ovdd_cpu_big1_s0^rdp#regulator-state-memvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[71aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop' ()* + *disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ 1aclkiface- *disabled'serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK51baudclkapb_pclk:,,?txrx-$defaultIS *disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 1pwmpclk.$default` *disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 1pwmpclk/$default`*okaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 1pwmpclk0$default` *disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 1pwmpclk1$default` *disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd+power-controller!rockchip,rk3588-power-controllerk+*okaypower-domain@8k+power-domain@9  5!#" 234k+power-domain@10 5!#"5kpower-domain@11 5!#"6kpower-domain@12 5789:kpower-domain@13 +kpower-domain@14(5;kpower-domain@15 5<kpower-domain@165 =>?+kpower-domain@17 5 @ABkpower-domain@215 CDEFGHIJ+kpower-domain@235CAKkpower-domain@14 5;kpower-domain@155<kpower-domain@225Lkpower-domain@245[Z]MN+kpower-domain@2585ZOkpower-domain@2685QPQkpower-domain@2705RSTU+kpower-domain@28 5VWkpower-domain@29(5XYkpower-domain@305z{Zkpower-domain@31@5W[\]^kpower-domain@33!5WZ[kpower-domain@34"5WZ[kpower-domain@37%52_kpower-domain@38&545kpower-domain@40(`ki2s@fddc0000rockchip,rk3588-i2s-tdm51mclk_txmclk_rxhclk<:a?txNtx-m *disabledi2s@fddf0000rockchip,rk3588-i2s-tdm54451mclk_txmclk_rxhclk<1:a?txNtx-m *disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500,1mclk_txmclk_rxhclk<-:a?rxNrx-m *disabledqos@fdf35000rockchip,rk3588-qossysconP 7qos@fdf35200rockchip,rk3588-qossysconR 8qos@fdf35400rockchip,rk3588-qossysconT 9qos@fdf35600rockchip,rk3588-qossysconV :qos@fdf36000rockchip,rk3588-qossyscon` Zqos@fdf39000rockchip,rk3588-qossyscon _qos@fdf3d800rockchip,rk3588-qossyscon `qos@fdf3e000rockchip,rk3588-qossyscon \qos@fdf3e200rockchip,rk3588-qossyscon [qos@fdf3e400rockchip,rk3588-qossyscon ]qos@fdf3e600rockchip,rk3588-qossyscon ^qos@fdf40000rockchip,rk3588-qossyscon Xqos@fdf40200rockchip,rk3588-qossyscon Yqos@fdf40400rockchip,rk3588-qossyscon Rqos@fdf40500rockchip,rk3588-qossyscon Sqos@fdf40600rockchip,rk3588-qossyscon Tqos@fdf40800rockchip,rk3588-qossyscon Uqos@fdf41000rockchip,rk3588-qossyscon Vqos@fdf41100rockchip,rk3588-qossyscon Wqos@fdf60000rockchip,rk3588-qossyscon =qos@fdf60200rockchip,rk3588-qossyscon >qos@fdf60400rockchip,rk3588-qossyscon ?qos@fdf61000rockchip,rk3588-qossyscon @qos@fdf61200rockchip,rk3588-qossyscon Aqos@fdf61400rockchip,rk3588-qossyscon Bqos@fdf62000rockchip,rk3588-qossyscon ;qos@fdf63000rockchip,rk3588-qossyscon0 <qos@fdf64000rockchip,rk3588-qossyscon@ Kqos@fdf66000rockchip,rk3588-qossyscon` Cqos@fdf66200rockchip,rk3588-qossysconb Dqos@fdf66400rockchip,rk3588-qossyscond Eqos@fdf66600rockchip,rk3588-qossysconf Fqos@fdf66800rockchip,rk3588-qossysconh Gqos@fdf66a00rockchip,rk3588-qossysconj Hqos@fdf66c00rockchip,rk3588-qossysconl Iqos@fdf66e00rockchip,rk3588-qossysconn Jqos@fdf67000rockchip,rk3588-qossysconp Lqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 5qos@fdf71000rockchip,rk3588-qossyscon 6qos@fdf72000rockchip,rk3588-qossyscon 2qos@fdf72200rockchip,rk3588-qossyscon" 3qos@fdf72400rockchip,rk3588-qossyscon$ 4qos@fdf80000rockchip,rk3588-qossyscon Oqos@fdf81000rockchip,rk3588-qossyscon Pqos@fdf81200rockchip,rk3588-qossyscon Qqos@fdf82000rockchip,rk3588-qossyscon Mqos@fdf82200rockchip,rk3588-qossyscon" Npcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`bbbb 0c0 " pcie-phy"T @ @0 @@dbiapbconfigN). pwrpipe+ *disabledlegacy-interrupt-controller bpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`dddd @c@ e pcie-phy"T @ @0 A@dbiapbconfigN*/ pwrpipe+*okay$defaultf 1g=hlegacy-interrupt-controller ddfi@fe060000rockchip,rk3588-dfi@&0: iethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567Y^501stmmacethclk_mac_refpclk_macaclk_macptp_ref!N$ stmmaceth (M%^jnkl *disabledmdiosnps,dwmac-mdio+stmmac-axi-configjrx-queues-configkqueue0queue1tx-queues-configlqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo1satapmaliverxoobrefasic+ *disabledsata-port@0@ e sata-phy# 2 sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq1satapmaliverxoobrefasic+ *disabledsata-port@0@ " sata-phy# 2 spi@fe2b0000 rockchip,sfc+@5/01clk_sfchclk_sfc+ *disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  1biuciuciu-driveciu-sampleAL $defaultmnop(*okayZbis qrsmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 51biuciuciu-driveciu-sampleAL $defaultt%*okaybi#0uvmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.1corebusaxiblocktimerL wxyz{$default(Ncorebusaxiblocktimer*okayiZ=Li2s@fe470000rockchip,rk3588-i2s-tdmG5+/(1mclk_txmclk_rxhclk<)-:,,?txrx&N*+ tx-mrx-mf$default|}~*okayportendpointi2si2s@fe480000rockchip,rk3588-i2s-tdmH5y}u1mclk_txmclk_rxhclk:,,?txrxN^_ tx-mrx-mf$default( *disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI51i2s_clki2s_hclk<:?txrx&$default *disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%1i2s_clki2s_hclk<":?txrx&$default *disabledinterrupt-controller@fe600000 arm,gic-v3 `h a8+msi-controller@fe640000arm,gic-v3-itsdcmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell@ VW5n 1apb_pclk,dma-controller@fea30000arm,pl330arm,primecell@ XY5o 1apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ 1i2cpclk>$default+ *disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| 1i2cpclk?$default+ *disabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} 1i2cpclk@$default+ *disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ 1i2cpclkA$default+ *disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkB$default+ *disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW 1pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc 1tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF51spiclkapb_pclk:,,?txrx $default+ *disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG51spiclkapb_pclk:,,?txrx $default+ *disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH51spiclkapb_pclk:?txrx$default+*okay<L pmic@0rockchip,rk806 B@ q$default  /# ;# G# S# _# k# w# # # #  #   #  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1rdp~0 Ovdd_gpu_s0 regulator-state-memdcdc-reg2^rdp~0Ovdd_cpu_lit_s0 regulator-state-memdcdc-reg3^r L q0 Ovdd_log_s0regulator-state-mem . qdcdc-reg4^rdp~0 Ovdd_vdenc_s0regulator-state-memdcdc-reg5^r L 0 Ovdd_ddr_s0regulator-state-mem . Pdcdc-reg6^r Ovdd2_ddr_s3regulator-state-mem Jdcdc-reg7^r0Ovdd_2v0_pldo_s3regulator-state-mem J .dcdc-reg8^r2Z2Z Ovcc_3v3_s3rregulator-state-mem J .2Zdcdc-reg9^r Ovddq_ddr_s0regulator-state-memdcdc-reg10^rw@w@ Ovcc_1v8_s3vregulator-state-mem J .w@pldo-reg1^rw@w@ Oavcc_1v8_s0regulator-state-mempldo-reg2^rw@w@ Ovcc_1v8_s0regulator-state-mem .w@pldo-reg3^rOO Oavdd_1v2_s0regulator-state-mempldo-reg4^r2Z2Z0 Ovcc_3v3_s0regulator-state-mempldo-reg5^rw@2Z0 Ovccio_sd_s0sregulator-state-mempldo-reg6^rw@w@ Opldo6_s3regulator-state-mem J .w@nldo-reg1^r q q Ovdd_0v75_s3regulator-state-mem J . qnldo-reg2^r P POvdd_ddr_pll_s0regulator-state-mem . Pnldo-reg3^r q q Oavdd_0v75_s0regulator-state-memnldo-reg4^r P P Ovdd_0v85_s0regulator-state-memnldo-reg5^r q q Ovdd_0v75_s0regulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI51spiclkapb_pclk:?txrx $default+ *disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL51baudclkapb_pclk:,, ?txrx$defaultSI *disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM51baudclkapb_pclk:, , ?txrx$defaultSI*okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN51baudclkapb_pclk:, , ?txrx$defaultSI *disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO51baudclkapb_pclk: ?txrx$defaultSI *disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP51baudclkapb_pclk: ?txrx$defaultSI *disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ51baudclkapb_pclk: ?txrx $defaultSI*okayserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR51baudclkapb_pclk:aa?txrx$defaultSI *disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS51baudclkapb_pclk:a a ?txrx$defaultSI *disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT51baudclkapb_pclk:a a ?txrx$defaultSI *disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK 1pwmpclk$default` *disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK 1pwmpclk$default` *disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK 1pwmpclk$default` *disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK 1pwmpclk$default` *disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON 1pwmpclk$default` *disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON 1pwmpclk$default` *disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON 1pwmpclk$default` *disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON 1pwmpclk$default` *disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ 1pwmpclk$default` *disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ 1pwmpclk$default` *disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ 1pwmpclk$default` *disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ 1pwmpclk$default` *disabledtsadc@fec00000rockchip,rk3588-tsadc51tsadcapb_pclk<LNVWtsadc-apbtsadc b y   $gpiootpout  *disabledadc@fec10000rockchip,rk3588-saradc 51saradcapb_pclkNU saradc-apb*okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkC$default+*okayrtc@51haoyu,hym8563Qhym8563$default qi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkD$default+*okayaudio-codec@11everest,es8316511mclk<1Lportendpointi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkE$default+ *disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ51spiclkapb_pclk:a a?txrx $default+ *disabledefuse@fecc0000rockchip,rk3588-otp 51otpapb_pclkphyarbN otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p 1apb_pclkaphy@fee00000rockchip,rk3588-naneng-combphy5vW 1refapbpipe<LN<Cphyapb % *okayephy@fee20000rockchip,rk3588-naneng-combphy5xW 1refapbpipe<LN>Ephyapb % *okay"sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl +gpio@fd8a0000rockchip,gpio-bank5qr    qgpio@fec20000rockchip,gpio-bank5st    gpio@fec30000rockchip,gpio-bank5uv  @  gpio@fec40000rockchip,gpio-bank5wx  `  ggpio@fec50000rockchip,gpio-bank5yz    pcfg-pull-up "pcfg-pull-down /pcfg-pull-none >pcfg-pull-none-drv-level-2 > Kpcfg-pull-up-drv-level-1 " Kpcfg-pull-up-drv-level-2 " Kpcfg-pull-none-smt > Zauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout owemmc-bus8 oxemmc-clk oyemmc-cmd ozemmc-data-strobe o{eth1fspigmac1gpuhdmii2c0i2c0m2-xfer o&i2c1i2c1m0-xfer o  i2c2i2c2m0-xfer o  i2c3i2c3m0-xfer o  i2c4i2c4m0-xfer o  i2c5i2c5m0-xfer o  i2c6i2c6m0-xfer o  i2c7i2c7m0-xfer o  i2c8i2c8m0-xfer o  i2s0i2s0-lrck o|i2s0-mclk o}i2s0-sclk o~i2s0-sdi0 oi2s0-sdo0 oi2s1i2s1m0-lrck oi2s1m0-sclk oi2s1m0-sdi0 oi2s1m0-sdi1 oi2s1m0-sdi2 oi2s1m0-sdi3 oi2s1m0-sdo0 o i2s1m0-sdo1 o i2s1m0-sdo2 o i2s1m0-sdo3 o i2s2i2s2m1-lrck oi2s2m1-sclk o i2s2m1-sdi o i2s2m1-sdo o i2s3i2s3-lrck oi2s3-sclk oi2s3-sdi oi2s3-sdo ojtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp opmupwm0pwm0m0-pins o.pwm1pwm1m0-pins o/pwm2pwm2m0-pins o0pwm3pwm3m0-pins o1pwm4pwm4m0-pins o pwm5pwm5m0-pins o pwm6pwm6m0-pins o pwm7pwm7m0-pins o pwm8pwm8m0-pins o pwm9pwm9m0-pins o pwm10pwm10m0-pins o pwm11pwm11m0-pins o pwm12pwm12m0-pins o pwm13pwm13m0-pins o pwm14pwm14m0-pins o pwm15pwm15m0-pins o refclksatasata0sata1sata2sdiosdiom0-pins` o   tsdmmcsdmmc-bus4@ opsdmmc-clk omsdmmc-cmd onsdmmc-det oospdif0spdif1spi0spi0m0-pins0 ospi0m0-cs0 ospi0m0-cs1 ospi1spi1m1-pins0 ospi1m1-cs0 ospi1m1-cs1 ospi2spi2m2-pins0 o spi2m2-cs0 o spi3spi3m1-pins0 o spi3m1-cs0 ospi3m1-cs1 ospi4spi4m0-pins0 ospi4m0-cs0 ospi4m0-cs1 otsadctsadc-shut ouart0uart0m1-xfer o -uart1uart1m1-xfer o  uart2uart2m0-xfer o uart3uart3m1-xfer o  uart4uart4m1-xfer o  uart5uart5m1-xfer o  uart6uart6m1-xfer o  uart6m1-ctsn o uart6m1-rtsn o uart7uart7m1-xfer o  uart8uart8m1-xfer o  uart9uart9m1-xfer o  vopbt656gpio-functsadc-gpio-func oeth0gmac0hym8563hym8563-int oledsled-rgb-b osoundhp-detect opcie2pcie2-0-rst opcie2-0-vcc-en opcie2-2-rst ofpcie3pcie3-rst opcie3-vcc3v3-en ousbvcc5v0-host-en ovideo-codec@fdc70000rockchip,rk3588-av1-vpulvdpu<ACLׄׄ5AC 1aclkhclk Nsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\i2s@fddc8000rockchip,rk3588-i2s-tdm܀51mclk_txmclk_rxhclk<:a?txNtx-m *disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@599?1mclk_txmclk_rxhclk<6:a?txNtx-m *disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5++'1mclk_txmclk_rxhclk<(:a?rxNrx-m *disabledi2s@fde00000rockchip,rk3588-i2s-tdm5&&"1mclk_txmclk_rxhclk<#:a?rxNrx-m *disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+05@E;JOt)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`   pcie-phy"T @ @0 @@dbiapbconfigN&+ pwrpipe*okay$default 1=legacy-interrupt-controller pcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+05AF<KPu)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`   pcie-phy"T @ @@0 @@@dbiapbconfigN', pwrpipe *disabledlegacy-interrupt-controller pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /05BG=LQ)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr` c   pcie-phy"T @ @0 @@dbiapbconfigN(- pwrpipe+*okay$default 1=ulegacy-interrupt-controller ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567X]401stmmacethclk_mac_refpclk_macaclk_macptp_ref!N# stmmaceth (M%^n *disabledmdiosnps,dwmac-mdio+stmmac-axi-configrx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5c`fUp1satapmaliverxoobrefasic+ *disabledsata-port@0@  sata-phy# 2 phy@fee10000rockchip,rk3588-naneng-combphy5wW 1refapbpipe<LN=Dphyapb % *okayphy@fee80000rockchip,rk3588-pcie3-phy5y1pclkNHphy % }*okaychosen serial2:1500000n8analog-soundaudio-graph-card rk3588-es8316) MicrophoneMic JackHeadphoneHeadphones. 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