0k8#4( 7"#pine64,quartzpro64rockchip,rk3588 +7PINE64 QuartzPro64aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1b0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  cpu@100 cpuarm,cortex-a55psci': f v@@ cpu@200 cpuarm,cortex-a55psci': f v@@ cpu@300 cpuarm,cortex-a55psci': f v@@ cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@cpu@500 cpuarm,cortex-a76psci': f v@@cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@cpu@700 cpuarm,cortex-a76psci': f v@@ idle-statespscicpu-sleeparm,idle-state(9Pdaxq l2-cache-l0cachex@ l2-cache-l1cachex@l2-cache-l2cachex@l2-cache-l3cachex@l2-cache-b0cachex@l2-cache-b1cachex@l2-cache-b2cachex@l2-cache-b3cachex@l3-cachecachex0@firmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splldisplay-subsystemrockchip,display-subsystemtimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram +sram@0arm,scmi-shmemusb@fc800000"rockchip,rk3588-ehcigeneric-ehci:usb!/okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci:usb!/okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci: !usb!/okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci: !usb!/okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(:jihkr&6ref_clksuspend_clkbus_clkutmipipeBhost" usb3-phy Jutmi_wideS4Zr /disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXgsyscon@fd58c000rockchip,rk3588-sys-grfsysconX'syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ (syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ)syscon@fd5b0000rockchip,rk3588-php-grfsyscon[$syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@8000rockchip,rk3588-usb2phySophyapb:6phyclk usb480m_phy2/okayhost-port/okay#syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@c000rockchip,rk3588-usb2phySp phyapb:6phyclk usb480m_phy3/okay host-port/okay#!syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram` `+clock-controller@fd7c0000rockchip,rk3588-cru|A]q@QA.2Fq)׫ׄe/ׄ eZ р $i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=:ts 6i2cpclk%)default+ /disabledvop@fdd90000rockchip,rk3588-vop BP7vopgamma-lut8:]\abcd[76aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopA&!'H(Y)j* /disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~:]\ 6aclkifacew! /disabled&serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK:6baudclkapb_pclk++txrx,)default /disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm: 6pwmpclk-)default /disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm: 6pwmpclk.)default /disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm : 6pwmpclk/)default /disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0: 6pwmpclk0)default /disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd*power-controller!rockchip,rk3588-power-controller+/okaypower-domain@8+power-domain@9  :!#" 123+power-domain@10 :!#"4power-domain@11 :!#"5power-domain@12 :6789power-domain@13 +power-domain@14(::power-domain@15 :;power-domain@16: <=>+power-domain@17 : ?@Apower-domain@21: BCDEFGHI+power-domain@23:CAJpower-domain@14 ::power-domain@15:;power-domain@22:Kpower-domain@24:[Z]LM+power-domain@258:ZNpower-domain@268:QOPpower-domain@270:QRST+power-domain@28 :UVpower-domain@29(:WXpower-domain@30:z{Ypower-domain@31@:WZ[\]power-domain@33!:WZ[power-domain@34":WZ[power-domain@37%:2^power-domain@38&:45power-domain@40(_i2s@fddc0000rockchip,rk3588-i2s-tdm:6mclk_txmclk_rxhclkA`tx!Stx-m /disabledi2s@fddf0000rockchip,rk3588-i2s-tdm:4456mclk_txmclk_rxhclkA1`tx!Stx-m /disabledi2s@fddfc000rockchip,rk3588-i2s-tdm:00,6mclk_txmclk_rxhclkA-`rx!Srx-m /disabledqos@fdf35000rockchip,rk3588-qossysconP 6qos@fdf35200rockchip,rk3588-qossysconR 7qos@fdf35400rockchip,rk3588-qossysconT 8qos@fdf35600rockchip,rk3588-qossysconV 9qos@fdf36000rockchip,rk3588-qossyscon` Yqos@fdf39000rockchip,rk3588-qossyscon ^qos@fdf3d800rockchip,rk3588-qossyscon _qos@fdf3e000rockchip,rk3588-qossyscon [qos@fdf3e200rockchip,rk3588-qossyscon Zqos@fdf3e400rockchip,rk3588-qossyscon \qos@fdf3e600rockchip,rk3588-qossyscon ]qos@fdf40000rockchip,rk3588-qossyscon Wqos@fdf40200rockchip,rk3588-qossyscon Xqos@fdf40400rockchip,rk3588-qossyscon Qqos@fdf40500rockchip,rk3588-qossyscon Rqos@fdf40600rockchip,rk3588-qossyscon Sqos@fdf40800rockchip,rk3588-qossyscon Tqos@fdf41000rockchip,rk3588-qossyscon Uqos@fdf41100rockchip,rk3588-qossyscon Vqos@fdf60000rockchip,rk3588-qossyscon <qos@fdf60200rockchip,rk3588-qossyscon =qos@fdf60400rockchip,rk3588-qossyscon >qos@fdf61000rockchip,rk3588-qossyscon ?qos@fdf61200rockchip,rk3588-qossyscon @qos@fdf61400rockchip,rk3588-qossyscon Aqos@fdf62000rockchip,rk3588-qossyscon :qos@fdf63000rockchip,rk3588-qossyscon0 ;qos@fdf64000rockchip,rk3588-qossyscon@ Jqos@fdf66000rockchip,rk3588-qossyscon` Bqos@fdf66200rockchip,rk3588-qossysconb Cqos@fdf66400rockchip,rk3588-qossyscond Dqos@fdf66600rockchip,rk3588-qossysconf Eqos@fdf66800rockchip,rk3588-qossysconh Fqos@fdf66a00rockchip,rk3588-qossysconj Gqos@fdf66c00rockchip,rk3588-qossysconl Hqos@fdf66e00rockchip,rk3588-qossysconn Iqos@fdf67000rockchip,rk3588-qossysconp Kqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 4qos@fdf71000rockchip,rk3588-qossyscon 5qos@fdf72000rockchip,rk3588-qossyscon 1qos@fdf72200rockchip,rk3588-qossyscon" 2qos@fdf72400rockchip,rk3588-qossyscon$ 3qos@fdf80000rockchip,rk3588-qossyscon Nqos@fdf81000rockchip,rk3588-qossyscon Oqos@fdf81200rockchip,rk3588-qossyscon Pqos@fdf82000rockchip,rk3588-qossyscon Lqos@fdf82200rockchip,rk3588-qossyscon" Mpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0:CH>MR)6aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`&aaaa4ET0b0\" pcie-phy!"T  @ @0 @@7dbiapbconfigS). pwrpipe+/okay)defaultc fdlegacy-interrupt-controllerr apcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0:DI?NSs)6aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`&eeee4ET@b@\f pcie-phy!"T  @ @0 A@7dbiapbconfigS*/ pwrpipe+ /disabledlegacy-interrupt-controllerr edfi@fe060000rockchip,rk3588-dfi@&0:jgethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^506stmmacethclk_mac_refpclk_macaclk_macptp_ref!!S$ stmmaceth'$hij /disabledmdiosnps,dwmac-mdio+stmmac-axi-confighrx-queues-configiqueue0queue1tx-queues-config(jqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTo6satapmaliverxoobrefasic>+/okaysata-port@0P@f sata-phy] l sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVq6satapmaliverxoobrefasic>+ /disabledsata-port@0P@" sata-phy] l spi@fe2b0000 rockchip,sfc+@:/06clk_sfchclk_sfc+ /disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  6biuciuciu-driveciu-sample{р)defaultklmn!(/okay opqmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ :6biuciuciu-driveciu-sample{ )defaultr!% /disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.A-., Q n6 (:,*+-.6corebusaxiblocktimerрstuvw)default(Scorebusaxiblocktimer/okay i2s@fe470000rockchip,rk3588-i2s-tdmG:+/(6mclk_txmclk_rxhclkA)-++txrx!&S*+ tx-mrx-m6)defaultxyz{|/okayi2s@fe480000rockchip,rk3588-i2s-tdmH:y}u6mclk_txmclk_rxhclk++txrxS^_ tx-mrx-m6)default(}~ /disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI:6i2s_clki2s_hclkAtxrx!&)default /disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ:%6i2s_clki2s_hclkA"txrx!&)default /disabledinterrupt-controller@fe600000 arm,gic-v3 `h rQa[8f +msi-controller@fe640000arm,gic-v3-itsdfubmsi-controller@fe660000arm,gic-v3-itsffuppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell@ VW:n 6apb_pclk+dma-controller@fea30000arm,pl330arm,primecell@ XY:o 6apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c:{ 6i2cpclk>)default+ /disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c:| 6i2cpclk?)default+/okayrtc@51haoyu,hym8563Qhym8563 o)defaulti2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c:} 6i2cpclk@)default+ /disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c:~ 6i2cpclkA)default+ /disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c: 6i2cpclkB)default+ /disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !:TW 6pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt:dc 6tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF:6spiclkapb_pclk++txrx )default+ /disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG:6spiclkapb_pclk++txrx )default+ /disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH:6spiclkapb_pclktxrx )default+/okayAQ pmic@0rockchip,rk806 o)defaultB@*6BNZgtdvs1-null-pinsgpio_pwrctrl1 pin_fun0dvs2-null-pinsgpio_pwrctrl2 pin_fun0dvs3-null-pinsgpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1 vdd_gpu_s0dp ~ "0regulator-state-mem 7dcdc-reg2 vdd_npu_s0 Pdp ~ "0regulator-state-mem 7dcdc-reg3 vdd_log_s0 P L q "0regulator-state-mem 7 d qdcdc-reg4 vdd_vdenc_s0 Pdp ~ "0regulator-state-mem 7dcdc-reg5vdd_gpu_mem_s0 L ~ "0regulator-state-mem 7dcdc-reg6vdd_npu_mem_s0 P L ~ "0regulator-state-mem 7dcdc-reg7vdd_2v0_pldo_s3 P  "0regulator-state-mem  ddcdc-reg8vdd_vdenc_mem_s0 P L ~ "0regulator-state-mem 7dcdc-reg9 vdd2_ddr_s3 Pregulator-state-mem dcdc-reg10vcc_1v1_nldo_s3 P  "0regulator-state-mem  dpldo-reg1 avcc_1v8_s0 Pw@ w@ "0regulator-state-mem 7pldo-reg2vdd1_1v8_ddr_s3 Pw@ w@ "0regulator-state-mem  dw@pldo-reg3avcc_1v8_codec_s0 Pw@ w@ "0regulator-state-mem 7pldo-reg4 vcc_3v3_s3 P2Z 2Z "0pregulator-state-mem  d2Zpldo-reg5 vccio_sd_s0 Pw@ 2Z "0qregulator-state-mem 7pldo-reg6 vcc_1v8_s3 Pw@ w@ "0regulator-state-mem  dw@nldo-reg1 vdd_0v75_s3 P q q "0regulator-state-mem  d qnldo-reg2vdd2l_0v9_ddr_s3 P  regulator-state-mem  d nldo-reg3vdd_0v75_hdmi_edp_s0 P q qregulator-state-mem 7nldo-reg4 avdd_0v75_s0 P q qregulator-state-mem 7nldo-reg5 vdd_0v85_s0 P P Pregulator-state-mem 7pmic@1rockchip,rk806 o )defaultB@*6BNZgtdvs1-null-pinsgpio_pwrctrl1 pin_fun0dvs2-null-pinsgpio_pwrctrl2 pin_fun0dvs3-null-pinsgpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1vdd_cpu_big1_s0 Pdp  "0regulator-state-mem 7dcdc-reg2vdd_cpu_big0_s0 Pdp  "0regulator-state-mem 7dcdc-reg3vdd_cpu_lit_s0 Pdp ~ "0 regulator-state-mem 7dcdc-reg4 vcc_3v3_s0 P2Z 2Z "0regulator-state-mem 7dcdc-reg5vdd_cpu_big1_mem_s0 P L  "0regulator-state-mem 7dcdc-reg6vdd_cpu_big0_mem_s0 P L  "0regulator-state-mem 7dcdc-reg7 vcc_1v8_s0 Pw@ w@ "0regulator-state-mem 7dcdc-reg8vdd_cpu_lit_mem_s0 P L ~ "0regulator-state-mem 7dcdc-reg9 vddq_ddr_s0 Pregulator-state-mem 7dcdc-reg10 vdd_ddr_s0 P L  "0regulator-state-mem 7pldo-reg1vcc_1v8_cam_s0 Pw@ w@ "0regulator-state-mem 7pldo-reg2avdd1v8_ddr_pll_s0 Pw@ w@ "0regulator-state-mem 7pldo-reg3vdd_1v8_pll_s0 Pw@ w@ "0regulator-state-mem 7pldo-reg4vcc_3v3_sd_s0 P2Z 2Z "0regulator-state-mem 7pldo-reg5vcc_2v8_cam_s0 P* * "0regulator-state-mem 7pldo-reg6 pldo6_s3 Pw@ w@regulator-state-mem  dw@nldo-reg1vdd_0v75_pll_s0 P q q "0regulator-state-mem 7nldo-reg2vdd_ddr_pll_s0 P P Pregulator-state-mem 7nldo-reg3 avdd_0v85_s0 P P P "0regulator-state-mem 7nldo-reg4avdd_1v2_cam_s0 PO O "0regulator-state-mem 7nldo-reg5 avdd_1v2_s0 PO O "0regulator-state-mem 7spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:6spiclkapb_pclktxrx )default+ /disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:6baudclkapb_pclk++ txrx)default /disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:6baudclkapb_pclk+ + txrx)default/okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:6baudclkapb_pclk+ + txrx)default /disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:6baudclkapb_pclk txrx)default /disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:6baudclkapb_pclk txrx)default /disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:6baudclkapb_pclk txrx)default /disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR:6baudclkapb_pclk``txrx)default /disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS:6baudclkapb_pclk` ` txrx)default /disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT:6baudclkapb_pclk` ` txrx)default /disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK 6pwmpclk)default /disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK 6pwmpclk)default /disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :LK 6pwmpclk)default /disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:LK 6pwmpclk)default /disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON 6pwmpclk)default /disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON 6pwmpclk)default /disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :ON 6pwmpclk)default /disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:ON 6pwmpclk)default /disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ 6pwmpclk)default /disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ 6pwmpclk)default /disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ 6pwmpclk)default /disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ 6pwmpclk)default /disabledtsadc@fec00000rockchip,rk3588-tsadc:6tsadcapb_pclkAQSVWtsadc-apbtsadc     )gpiootpout /okayadc@fec10000rockchip,rk3588-saradc :6saradcapb_pclkSU saradc-apb/okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: 6i2cpclkC)default+ /disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: 6i2cpclkD)default+/okayaudio-codec@11everest,es8388A1Q:16mclk  + 7 8i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: 6i2cpclkE)default+ /disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:6spiclkapb_pclk` `txrx )default+ /disabledefuse@fecc0000rockchip,rk3588-otp :6otpapb_pclkphyarbS otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Dnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[:p 6apb_pclk`phy@fee00000rockchip,rk3588-naneng-combphy:vW 6refapbpipeAQS<Cphyapb I$ [/okayfphy@fee20000rockchip,rk3588-naneng-combphy:xW 6refapbpipeAQS>Ephyapb I$ [/okay"sram@ff001000 mmio-sram +pinctrlrockchip,rk3588-pinctrl +gpio@fd8a0000rockchip,gpio-bank:qr q rogpio@fec20000rockchip,gpio-bank:st q rgpio@fec30000rockchip,gpio-bank:uv q@ rgpio@fec40000rockchip,gpio-bank:wx q` rgpio@fec50000rockchip,gpio-bank:yz q rdpcfg-pull-up }pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1 } pcfg-pull-up-drv-level-2 } pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout semmc-bus8 temmc-clk uemmc-cmd vemmc-data-strobe weth1fspigmac1gpuhdmii2c0i2c0m0-xfer %i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck xi2s0-mclk yi2s0-sclk zi2s0-sdi0 {i2s0-sdo0 |i2s1i2s1m0-lrck }i2s1m0-sclk ~i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins -pwm1pwm1m0-pins .pwm2pwm2m0-pins /pwm3pwm3m0-pins 0pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` rsdmmcsdmmc-bus4@ nsdmmc-clk ksdmmc-cmd lsdmmc-det mspdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi2m2-cs1 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut uart0uart0m1-xfer  ,uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20 gmac0-rgmii-clk  gmac0-rgmii-bus@   hym8563hym8563-int ledsled-pins rtl8111rtl8111-isolate crtl8211frtl8211f-rst  soundhp-detect usbvcc5v0-host-en video-codec@fdc70000rockchip,rk3588-av1-vpulvdpuAACQׄׄ:AC 6aclkhclk! Ssyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\i2s@fddc8000rockchip,rk3588-i2s-tdm܀:6mclk_txmclk_rxhclkA`tx!Stx-m /disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@:99?6mclk_txmclk_rxhclkA6`tx!Stx-m /disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀:++'6mclk_txmclk_rxhclkA(`rx!Srx-m /disabledi2s@fde00000rockchip,rk3588-i2s-tdm:&&"6mclk_txmclk_rxhclkA#`rx!Srx-m /disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+0:@E;JOt)6aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`&4ET\ pcie-phy!"T  @ @0 @@7dbiapbconfigS&+ pwrpipe/okay fd legacy-interrupt-controllerr pcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+0:AF<KPu)6aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`&4ET\ pcie-phy!"T  @ @@0 @@@7dbiapbconfigS', pwrpipe /disabledlegacy-interrupt-controllerr pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /0:BG=LQ)6aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`&4ET b \ pcie-phy!"T  @ @0 @@7dbiapbconfigS(- pwrpipe+/okay fd legacy-interrupt-controllerr ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67X]406stmmacethclk_mac_refpclk_macaclk_macptp_ref!!S# stmmaceth'$/okay output  rgmii-rxid)default  Cmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916)default N  + fd stmmac-axi-configrx-queues-configqueue0queue1tx-queues-config(queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(:c`fUp6satapmaliverxoobrefasic>+ /disabledsata-port@0P@ sata-phy] l phy@fee10000rockchip,rk3588-naneng-combphy:wW 6refapbpipeAQS=Dphyapb I$ [/okayphy@fee80000rockchip,rk3588-pcie3-phy:y6pclkSHphy I$ =/okaychosen Nserial2:1500000n8adc-keys-0 adc-keys Z fbuttons ww@ dbutton-maskrom Mask Rom  adc-keys-1 adc-keys Z fbuttons ww@ dbutton-volume-up V+/REC s Ebutton-volume-down V- r Vbutton-menu MENU  button-esc ESC  *audio-amplifier-headphonesimple-audio-amplifier  Headphones Ampaudio-amplifier-speakersimple-audio-amplifier  Speaker Ampleds gpio-leds)defaultled-1  indicator lsoundsimple-audio-card)default Analog  !i2s : T r ^ MicrophoneOnboard MicrophoneMicrophoneMicrophone JackSpeakerSpeakerHeadphoneHeadphonesr HeadphonesLOUT1HeadphonesROUT1SpeakerLOUT2SpeakerROUT2HeadphonesHeadphones Amp OUTLHeadphonesHeadphones Amp OUTRHeadphones Amp INLLOUT1Headphones Amp INRROUT1SpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTRSpeaker Amp INLLOUT2Speaker Amp INRROUT2LINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphonesimple-audio-card,cpu  simple-audio-card,codec  vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin P vcc3v3-bt-regulatorregulator-fixed  l vcc3v3_bt2Z 2Z P ,vcc3v3-pcie30-regulatorregulator-fixed  lvcc3v3_pcie302Z 2Z  ,vcc3v3-wf-regulatorregulator-fixed  l  vcc3v3_wf2Z 2Z P ,vcc4v0-sys-regulatorregulator-fixed vcc4v0_sys P=  =  ,vcc5v0-host-regulatorregulator-fixed  md)default vcc5v0_host PLK@ LK@ ,#vcc5v0-usb-regulatorregulator-fixed vcc5v0_usb PLK@ LK@ , compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesportsinterrupt-namesrangesphysphy-namespower-domainsstatusclock-namesdr_modephy_typeresetssnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirkreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmu#iommu-cellsdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-cs#gpio-cellsgpio-controllerspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-nameregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-always-onregulator-suspend-microvoltregulator-on-in-suspendrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-gpiossound-name-prefixcolorsimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highstartup-delay-usvin-supply