28%`( "%()rockchip,rk3588-evb1-v10rockchip,rk3588 +7Rockchip RK3588 EVB1 V10 Boardaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1b0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  cpu@100cpuarm,cortex-a55psci"5 a q~@@ cpu@200cpuarm,cortex-a55psci"5 a q~@@ cpu@300cpuarm,cortex-a55psci"5 a q~@@ cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@500cpuarm,cortex-a76psci"5 a q~@@cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@cpu@700cpuarm,cortex-a76psci"5 a q~@@ idle-statespscicpu-sleeparm,idle-state#4Kd\xl l2-cache-l0caches@} l2-cache-l1caches@}l2-cache-l2caches@}l2-cache-l3caches@}l2-cache-b0caches@}l2-cache-b1caches@}l2-cache-b2caches@}l2-cache-b3caches@}l3-cachecaches0@}firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splldisplay-subsystemrockchip,display-subsystemtimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmemusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5 usb*okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5 usb*okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5  !usb*okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5  !usb*okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&1ref_clksuspend_clkbus_clkutmipipe=host " usb3-phy Eutmi_wideN4Um *disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXhsyscon@fd58c000rockchip,rk3588-sys-grfsysconX'syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ (syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ)syscon@fd5b0000rockchip,rk3588-php-grfsyscon[$syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@8000rockchip,rk3588-usb2phyNophyapb51phyclk usb480m_phy2*okayhost-port*okay#syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2-phy@c000rockchip,rk3588-usb2phyNp phyapb51phyclk usb480m_phy3*okay host-port*okay#!syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р  $i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts 1i2cpclk%$default+ *disabledvop@fdd90000rockchip,rk3588-vop BP2vopgamma-lut85]\abcd[71aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop<& 'C(T)e* *disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ 1aclkifacer *disabled&serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK51baudclkapb_pclk++txrx,$default *disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 1pwmpclk-$default *disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 1pwmpclk.$default *disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 1pwmpclk/$default*okaypwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 1pwmpclk0$default *disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd*power-controller!rockchip,rk3588-power-controller+*okaypower-domain@8+power-domain@9  5!#" 123+power-domain@10 5!#"4power-domain@11 5!#"5power-domain@12 56789power-domain@13 +power-domain@14(5:power-domain@15 5;power-domain@165 <=>+power-domain@17 5 ?@Apower-domain@215 BCDEFGHI+power-domain@235CAJpower-domain@14 5:power-domain@155;power-domain@225Kpower-domain@245[Z]LM+power-domain@2585ZNpower-domain@2685QOPpower-domain@2705QRST+power-domain@28 5UVpower-domain@29(5WXpower-domain@305z{Ypower-domain@31@5WZ[\]power-domain@33!5WZ[power-domain@34"5WZ[power-domain@37%52^power-domain@38&545power-domain@40(_i2s@fddc0000rockchip,rk3588-i2s-tdm51mclk_txmclk_rxhclk<`txNtx-m *disabledi2s@fddf0000rockchip,rk3588-i2s-tdm54451mclk_txmclk_rxhclk<1`txNtx-m *disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500,1mclk_txmclk_rxhclk<-`rxNrx-m *disabledqos@fdf35000rockchip,rk3588-qossysconP 6qos@fdf35200rockchip,rk3588-qossysconR 7qos@fdf35400rockchip,rk3588-qossysconT 8qos@fdf35600rockchip,rk3588-qossysconV 9qos@fdf36000rockchip,rk3588-qossyscon` Yqos@fdf39000rockchip,rk3588-qossyscon ^qos@fdf3d800rockchip,rk3588-qossyscon _qos@fdf3e000rockchip,rk3588-qossyscon [qos@fdf3e200rockchip,rk3588-qossyscon Zqos@fdf3e400rockchip,rk3588-qossyscon \qos@fdf3e600rockchip,rk3588-qossyscon ]qos@fdf40000rockchip,rk3588-qossyscon Wqos@fdf40200rockchip,rk3588-qossyscon Xqos@fdf40400rockchip,rk3588-qossyscon Qqos@fdf40500rockchip,rk3588-qossyscon Rqos@fdf40600rockchip,rk3588-qossyscon Sqos@fdf40800rockchip,rk3588-qossyscon Tqos@fdf41000rockchip,rk3588-qossyscon Uqos@fdf41100rockchip,rk3588-qossyscon Vqos@fdf60000rockchip,rk3588-qossyscon <qos@fdf60200rockchip,rk3588-qossyscon =qos@fdf60400rockchip,rk3588-qossyscon >qos@fdf61000rockchip,rk3588-qossyscon ?qos@fdf61200rockchip,rk3588-qossyscon @qos@fdf61400rockchip,rk3588-qossyscon Aqos@fdf62000rockchip,rk3588-qossyscon :qos@fdf63000rockchip,rk3588-qossyscon0 ;qos@fdf64000rockchip,rk3588-qossyscon@ Jqos@fdf66000rockchip,rk3588-qossyscon` Bqos@fdf66200rockchip,rk3588-qossysconb Cqos@fdf66400rockchip,rk3588-qossyscond Dqos@fdf66600rockchip,rk3588-qossysconf Eqos@fdf66800rockchip,rk3588-qossysconh Fqos@fdf66a00rockchip,rk3588-qossysconj Gqos@fdf66c00rockchip,rk3588-qossysconl Hqos@fdf66e00rockchip,rk3588-qossysconn Iqos@fdf67000rockchip,rk3588-qossysconp Kqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 4qos@fdf71000rockchip,rk3588-qossyscon 5qos@fdf72000rockchip,rk3588-qossyscon 1qos@fdf72200rockchip,rk3588-qossyscon" 2qos@fdf72400rockchip,rk3588-qossyscon$ 3qos@fdf80000rockchip,rk3588-qossyscon Nqos@fdf81000rockchip,rk3588-qossyscon Oqos@fdf81200rockchip,rk3588-qossyscon Pqos@fdf82000rockchip,rk3588-qossyscon Lqos@fdf82200rockchip,rk3588-qossyscon" Mpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`!aaaa/@O0b0W " pcie-phy"T @ @0 @@2dbiapbconfigN). pwrpipe+*okay ac$defaultdelegacy-interrupt-controllerm apcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`!ffff/@O@b@W g pcie-phy"T @ @0 A@2dbiapbconfigN*/ pwrpipe+ *disabledlegacy-interrupt-controllerm fdfi@fe060000rockchip,rk3588-dfi@&0:ehethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567Y^501stmmacethclk_mac_refpclk_macaclk_macptp_ref!N$ stmmaceth '$ijk *disabledmdiosnps,dwmac-mdio+stmmac-axi-configirx-queues-config jqueue0queue1tx-queues-config#kqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo1satapmaliverxoobrefasic9+*okaysata-port@0K@ g sata-phyX g sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq1satapmaliverxoobrefasic9+ *disabledsata-port@0K@ " sata-phyX g spi@fe2b0000 rockchip,sfc+@5/01clk_sfchclk_sfc+ *disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  1biuciuciu-driveciu-samplev $defaultlmno( *disabledmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 51biuciuciu-driveciu-samplev $defaultp% *disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.1corebusaxiblocktimer qrstu$default(Ncorebusaxiblocktimer*okayi2s@fe470000rockchip,rk3588-i2s-tdmG5+/(1mclk_txmclk_rxhclk<)-++txrx&N*+ tx-mrx-m$defaultvwxyz*okayi2s@fe480000rockchip,rk3588-i2s-tdmH5y}u1mclk_txmclk_rxhclk++txrxN^_ tx-mrx-m$default({|}~ *disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI51i2s_clki2s_hclk<txrx&$default *disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%1i2s_clki2s_hclk<"txrx&$default *disabledinterrupt-controller@fe600000 arm,gic-v3 `h ma8+msi-controller@fe640000arm,gic-v3-itsdbmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0(interrupt-partition-1( dma-controller@fea10000arm,pl330arm,primecell@ VW15n 1apb_pclkH+dma-controller@fea30000arm,pl330arm,primecell@ XY15o 1apb_pclkHi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ 1i2cpclk>$default+ *disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| 1i2cpclk?$default+*okayrtc@51haoyu,hym8563Qhym8563$default Si2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} 1i2cpclk@$default+ *disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ 1i2cpclkA$default+ *disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkB$default+ *disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW 1pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc 1tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF51spiclkapb_pclk++txrxa $default+ *disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG51spiclkapb_pclk++txrxa $default+ *disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH51spiclkapb_pclktxrxa $default+*okay<L pmic@0rockchip,rk806ht $defaultB@'4AN[dvs1-null-pinsggpio_pwrctrl1 lpin_fun0dvs2-null-pinsggpio_pwrctrl2 lpin_fun0dvs3-null-pinsggpio_pwrctrl3 lpin_fun0regulatorsdcdc-reg1udp~0 vdd_gpu_s0regulator-state-memdcdc-reg2 udp~0 vdd_npu_s0regulator-state-memdcdc-reg3 u L q0 vdd_log_s0regulator-state-mem $ qdcdc-reg4 udp~0 vdd_vdenc_s0regulator-state-memdcdc-reg5u L~0vdd_gpu_mem_s0regulator-state-memdcdc-reg6 u L~0vdd_npu_mem_s0regulator-state-memdcdc-reg7 u0vdd_2v0_pldo_s3regulator-state-mem @ $dcdc-reg8 u L~0vdd_vdenc_mem_s0regulator-state-memdcdc-reg9 u vdd2_ddr_s3regulator-state-mem @dcdc-reg10 u0vcc_1v1_nldo_s3regulator-state-mem @ $pldo-reg1 uw@w@0 avcc_1v8_s0regulator-state-mempldo-reg2 uw@w@0vdd1_1v8_ddr_s3regulator-state-mem @ $w@pldo-reg3 uw@w@0avcc_1v8_codec_s0regulator-state-mempldo-reg4 u2Z2Z0 vcc_3v3_s3regulator-state-mem @ $2Zpldo-reg5 uw@2Z0 vccio_sd_s0regulator-state-mempldo-reg6 uw@w@0 vccio_1v8_s3regulator-state-mem @ $w@nldo-reg1 u q q0 vdd_0v75_s3regulator-state-mem @ $ qnldo-reg2 u  vdd2l_0v9_ddr_s3regulator-state-mem @ $ nldo-reg3 u q qvdd_0v75_hdmi_edp_s0regulator-state-memnldo-reg4 u q q avdd_0v75_s0regulator-state-memnldo-reg5 u P P vdd_0v85_s0regulator-state-mempmic@1rockchip,rk806ht  $defaultB@'4AN[dvs1-null-pinsggpio_pwrctrl1 lpin_fun0dvs2-null-pinsggpio_pwrctrl2 lpin_fun0dvs3-null-pinsggpio_pwrctrl3 lpin_fun0regulatorsdcdc-reg1 udp0vdd_cpu_big1_s0regulator-state-memdcdc-reg2 udp0vdd_cpu_big0_s0regulator-state-memdcdc-reg3 udp~0vdd_cpu_lit_s0 regulator-state-memdcdc-reg4 u2Z2Z0 vcc_3v3_s0regulator-state-memdcdc-reg5 u L0vdd_cpu_big1_mem_s0regulator-state-memdcdc-reg6 u L0vdd_cpu_big0_mem_s0regulator-state-memdcdc-reg7 uw@w@0 vcc_1v8_s0regulator-state-memdcdc-reg8 u L~0vdd_cpu_lit_mem_s0regulator-state-memdcdc-reg9 u vddq_ddr_s0regulator-state-memdcdc-reg10 u L 0 vdd_ddr_s0regulator-state-mempldo-reg1 uw@w@0vcc_1v8_cam_s0regulator-state-mempldo-reg2 uw@w@0avdd1v8_ddr_pll_s0regulator-state-mempldo-reg3 uw@w@0vdd_1v8_pll_s0regulator-state-mempldo-reg4 u2Z2Z0vcc_3v3_sd_s0regulator-state-mempldo-reg5 u**0vcc_2v8_cam_s0regulator-state-mempldo-reg6 uw@w@ pldo6_s3regulator-state-mem @ $w@nldo-reg1 u q q0vdd_0v75_pll_s0regulator-state-memnldo-reg2 u P Pvdd_ddr_pll_s0regulator-state-memnldo-reg3 u P P0 avdd_0v85_s0regulator-state-memnldo-reg4 uOO0avdd_1v2_cam_s0regulator-state-memnldo-reg5 uOO0 avdd_1v2_s0regulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI51spiclkapb_pclktxrxa $default+ *disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL51baudclkapb_pclk++ txrx$default *disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM51baudclkapb_pclk+ + txrx$default*okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN51baudclkapb_pclk+ + txrx$default *disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO51baudclkapb_pclk txrx$default *disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP51baudclkapb_pclk txrx$default *disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ51baudclkapb_pclk txrx$default *disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR51baudclkapb_pclk``txrx$default *disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS51baudclkapb_pclk` ` txrx$default *disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT51baudclkapb_pclk` ` txrx$default *disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK 1pwmpclk$default *disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK 1pwmpclk$default *disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK 1pwmpclk$default *disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK 1pwmpclk$default *disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON 1pwmpclk$default *disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON 1pwmpclk$default *disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON 1pwmpclk$default *disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON 1pwmpclk$default *disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ 1pwmpclk$default *disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ 1pwmpclk$default *disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ 1pwmpclk$default *disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ 1pwmpclk$default *disabledtsadc@fec00000rockchip,rk3588-tsadc51tsadcapb_pclk<LNVWtsadc-apbtsadc X o   $gpiootpout  *disabledadc@fec10000rockchip,rk3588-saradc 51saradcapb_pclkNU saradc-apb*okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkC$default+ *disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkD$default+*okayaudio-codec@11everest,es838851<1L    i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 1i2cpclkE$default+ *disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ51spiclkapb_pclk` `txrxa $default+ *disabledefuse@fecc0000rockchip,rk3588-otp 51otpapb_pclkphyarbN otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[15p 1apb_pclkH`phy@fee00000rockchip,rk3588-naneng-combphy5vW 1refapbpipe<LN<Cphyapb $ *okaygphy@fee20000rockchip,rk3588-naneng-combphy5xW 1refapbpipe<LN>Ephyapb $ *okay"sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl +gpio@fd8a0000rockchip,gpio-bank5qrt 1 mhgpio@fec20000rockchip,gpio-bank5stt 1 mhgpio@fec30000rockchip,gpio-bank5uvt 1@ mhgpio@fec40000rockchip,gpio-bank5wxt 1` mhgpio@fec50000rockchip,gpio-bank5yzt 1 mhcpcfg-pull-up =pcfg-pull-down Jpcfg-pull-none Ypcfg-pull-none-drv-level-2 Y fpcfg-pull-up-drv-level-1 = fpcfg-pull-up-drv-level-2 = fpcfg-pull-none-smt Y uauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout qemmc-bus8 remmc-clk semmc-cmd temmc-data-strobe ueth1fspigmac1gpuhdmii2c0i2c0m0-xfer %i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck vi2s0-mclk wi2s0-sclk xi2s0-sdi0 yi2s0-sdo0 zi2s1i2s1m0-lrck {i2s1m0-sclk |i2s1m0-sdi0 }i2s1m0-sdi1 ~i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins -pwm1pwm1m0-pins .pwm2pwm2m0-pins /pwm3pwm3m0-pins 0pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` psdmmcsdmmc-bus4@ osdmmc-clk lsdmmc-cmd msdmmc-det nspdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi2m2-cs1 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut uart0uart0m1-xfer  ,uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20 gmac0-rgmii-clk  gmac0-rgmii-bus@   audioheadphone-detect headphone-amplifier-en speaker-amplifier-en rtl8111rtl8111-isolate ertl8211frtl8211f-rst  hym8563hym8563-int pcie2pcie2-1-rst dpcie3pcie3-reset vcc3v3-pcie30-en usbvcc5v0-host-en video-codec@fdc70000rockchip,rk3588-av1-vpulvdpu<ACLׄׄ5AC 1aclkhclk Nsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\i2s@fddc8000rockchip,rk3588-i2s-tdm܀51mclk_txmclk_rxhclk<`txNtx-m *disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@599?1mclk_txmclk_rxhclk<6`txNtx-m *disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5++'1mclk_txmclk_rxhclk<(`rxNrx-m *disabledi2s@fde00000rockchip,rk3588-i2s-tdm5&&"1mclk_txmclk_rxhclk<#`rxNrx-m *disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+05@E;JOt)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`!/@OW  pcie-phy"T @ @0 @@2dbiapbconfigN&+ pwrpipe*okay$default ac legacy-interrupt-controllerm pcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+05AF<KPu)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`!/@OW  pcie-phy"T @ @@0 @@@2dbiapbconfigN', pwrpipe *disabledlegacy-interrupt-controllerm pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /05BG=LQ)1aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`!/@O b W  pcie-phy"T @ @0 @@2dbiapbconfigN(- pwrpipe+ *disabledlegacy-interrupt-controllerm ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(567X]401stmmacethclk_mac_refpclk_macaclk_macptp_ref!N# stmmaceth '$*okay output  rgmii-rxid$default  Cmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916$default N   ac stmmac-axi-configrx-queues-config queue0queue1tx-queues-config#queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5c`fUp1satapmaliverxoobrefasic9+ *disabledsata-port@0K@  sata-phyX g phy@fee10000rockchip,rk3588-naneng-combphy5wW 1refapbpipe<LN=Dphyapb $  *disabledphy@fee80000rockchip,rk3588-pcie3-phy5y1pclkNHphy $ *okaychosen serial2:1500000n8adc-keys adc-keys  &buttons 7w@ Qdbutton-vol-up _Volume Up es pBhbutton-vol-down _Volume Down er p\button-menu _Menu e p button-escape _Escape e p8analog-soundsimple-audio-card$default RK3588 EVB1 Audio   i2s   4 NHeadphonesSpeakerd mSpeaker Amplifier INLLOUT2Speaker Amplifier INRROUT2SpeakerSpeaker Amplifier OUTLSpeakerSpeaker Amplifier OUTRHeadphones Amplifier INLLOUT1Headphones Amplifier INRROUT1HeadphonesHeadphones Amplifier OUTLHeadphonesHeadphones Amplifier OUTRLINPUT1Onboard MicrophoneRINPUT1Onboard MicrophoneLINPUT2Microphone JackRINPUT2Microphone Jack^ MicrophoneMicrophone JackMicrophoneOnboard MicrophoneHeadphoneHeadphonesSpeakerSpeakersimple-audio-card,cpu simple-audio-card,codec  headphone-amplifiersimple-audio-amplifier $default Headphones Amplifierspeaker-amplifiersimple-audio-amplifier $default Speaker Amplifierbacklightpwm-backlight  apcie20-avdd0v85-regulatorregulator-fixedpcie20_avdd0v85 u P P pcie20-avdd1v8-regulatorregulator-fixedpcie20_avdd1v8 uw@w@ pcie30-avdd0v75-regulatorregulator-fixedpcie30_avdd0v75 u q q pcie30-avdd1v8-regulatorregulator-fixedpcie30_avdd1v8 uw@w@ vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin uvcc3v3-pcie30-regulatorregulator-fixedvcc3v3_pcie302Z2Z  g  $defaultvcc5v0-host-regulatorregulator-fixed vcc5v0_hostu LK@LK@  /c$default #vcc5v0-sys-regulatorregulator-fixed vcc5v0_sys uLK@LK@ vcc5v0-usbdcin-regulatorregulator-fixedvcc5v0_usbdcin uLK@LK@ vcc5v0-usb-regulatorregulator-fixed vcc5v0_usb uLK@LK@  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesportsinterrupt-namesrangesphysphy-namespower-domainsstatusclock-namesdr_modephy_typeresetssnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirkreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmu#iommu-cellsdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthno-sdiono-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-nameregulator-enable-ramp-delayregulator-off-in-suspendregulator-always-onregulator-suspend-microvoltregulator-on-in-suspendrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltsimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,bitclock-mastersimple-audio-card,formatsimple-audio-card,frame-mastersimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,pin-switchessimple-audio-card,routingsimple-audio-card,widgetssound-daisystem-clock-frequencyenable-gpiossound-name-prefixpower-supplypwmsvin-supplyenable-active-highstartup-delay-us