Z8( ֜ ,powkiddy,x55rockchip,rk3566 7Powkiddy x55aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000/mmc@fe000000/mmc@fe2c0000cpus cpu@0cpu,arm,cortex-a55psci%9D cpu@100cpu,arm,cortex-a55psci%9D cpu@200cpu,arm,cortex-a55psci%9D cpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2DEopp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24mDxin32k ,fixed-clock=Mxin32k` jdefaultsram@10f000 ,mmio-sram xsram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkotg utmi_wideokay usb2-phy high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  &A0(;Dusb@fd800000 ,generic-ehci usb disabledusb@fd840000 ,generic-ohci usb disabledusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdD_io-domains&,rockchip,rk3568-pmu-io-voltage-domainokayJXftsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdD syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucruDclock-controller@fdd20000,rockchip,rk3568-cruxin24m G  Di2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk`!jdefault okaypmic@20,rockchip,rk817 HmclkMrk808-clkout1rk808-clkout2H"jdefault`#$/%;%G%S%_%k%w%%&DregulatorsDCDC_REG1 pq vdd_logicregulator-state-mem,E DCDC_REG2 pqvdd_gpuDFregulator-state-mem,DCDC_REG3vcc_ddrregulator-state-memaDCDC_REG42Z2Zvcc_3v3Dregulator-state-memaE2ZLDO_REG1w@w@ vcca1v8_pmuDregulator-state-memaEw@LDO_REG2   vdda_0v9regulator-state-mem,LDO_REG3   vdda0v9_pmuregulator-state-memaE LDO_REG42Z2Z vccio_acodecDregulator-state-mem,LDO_REG5w@2Z vccio_sdDregulator-state-mem,LDO_REG62Z2Z vcc3v3_pmuDregulator-state-memaE2ZLDO_REG7w@w@vcc_1v8Dregulator-state-mem,LDO_REG8w@w@ vcc1v8_dvpDregulator-state-memaLDO_REG9w@2Z vcc2v8_dvpDregulator-state-mem,BOOSTG`ReboostD&regulator-state-mem,OTG_SWITCH otg_switchregulator-state-mem,chargery''Iregulator@1c ,tcs,tcs4525 45vdd_cpu%Dregulator-state-mem,serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk#((`)jdefault(5 disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`*jdefault? disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`+jdefault? disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk`,jdefault? disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk`-jdefault? disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerJ Dpower-domain@7^.Jpower-domain@8 ^/01Jpower-domain@9  ^234Jpower-domain@10 ^56789:Jpower-domain@11 ^;Jpower-domain@13 ^<Jpower-domain@14 ^=>?Jpower-domain@15^@ABCDJgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' ejobmmugpugpubus%EokayuFDvideo-codec@fdea0400,rockchip,rk3568-vpu evdpu aclkhclkG iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface DGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkH iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface DHmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрresetokay`IJKLjdefaultethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a emacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth  M.NAOT disabledmdio,snps,dwmac-mdio stmmac-axi-config]gwDMrx-queues-configDNqueue0tx-queues-configDOqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2P  okay,rockchip,rk3566-vopports Dport@0 endpoint@2QD]port@1 endpoint@4RDTport@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkifaceokayDPdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyS apb okay ports port@0endpointTDRport@1endpointUDYpanel@0 ,powkiddy,x55-panelhimax,hx8394VWjdefault`X "WportendpointYDUdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyZ apb  disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefjdefault`[ ( okay\Dports port@0endpoint]DQport@1endpoint^Dqos@fe128000,rockchip,rk3568-qossyscon D.qos@fe138080,rockchip,rk3568-qossyscon D=qos@fe138100,rockchip,rk3568-qossyscon D>qos@fe138180,rockchip,rk3568-qossyscon D?qos@fe148000,rockchip,rk3568-qossyscon D/qos@fe148080,rockchip,rk3568-qossyscon D0qos@fe148100,rockchip,rk3568-qossyscon D1qos@fe150000,rockchip,rk3568-qossyscon D;qos@fe158000,rockchip,rk3568-qossyscon D5qos@fe158100,rockchip,rk3568-qossyscon D6qos@fe158180,rockchip,rk3568-qossyscon D7qos@fe158200,rockchip,rk3568-qossyscon D8qos@fe158280,rockchip,rk3568-qossyscon D9qos@fe158300,rockchip,rk3568-qossyscon D:qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D@qos@fe190280,rockchip,rk3568-qossyscon DAqos@fe190300,rockchip,rk3568-qossyscon DBqos@fe190380,rockchip,rk3568-qossyscon DCqos@fe190400,rockchip,rk3568-qossyscon DDqos@fe198000,rockchip,rk3568-qossyscon D<qos@fe1a8000,rockchip,rk3568-qossyscon D2qos@fe1a8080,rockchip,rk3568-qossyscon D3qos@fe1a8100,rockchip,rk3568-qossyscon D4dfi@fe230000,rockchip,rk3568-dfi#  _pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGesyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`/````=N]l{ pcie-phyTx @@pipe  disabledlegacy-interrupt-controller HD`mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрresetokay`abcdjdefaultmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрresetokaye `fghjdefaultispi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc`jjdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokay`klmnojdefaulti2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclk#ptxPQ tx-mrx-m okayDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclk#pprxtxRS tx-mrx-m jdefault`qrstokayDi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclk#pptxrxTtx-m jdefault`uvwx disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclk#pptxrxUV tx-mrx-m  disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclk#p rx`yz{|}~jdefaultXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\#ptxjdefault` disableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclk D(dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclk Dpi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk`jdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk`jdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk`jdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk`jdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk`jdefault okayD\watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk#((txrxjdefault `  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk#((txrxjdefault `  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk#((txrxjdefault `  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk#((txrxjdefault `  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk#(( `jdefault(5okay +bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt ;" M" Z" serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk#((`jdefault(5okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk#((`jdefault(5 disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk#(( `jdefault(5 disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk#( ( `jdefault(5 disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk#( ( `jdefault(5 disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk#((`jdefault(5 disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk#((`jdefault(5 disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk#((`jdefault(5 disabledthermal-zonescpu-thermal jd  tripscpu_alert0 p passiveDcpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal j  tripsgpu-threshold p passivegpu-target $ passiveDgpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclk  sjinitdefaultsleep`   okay  !Dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclk saradc-apb <okay NDpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault?okayDpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault? disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclk`jdefault? disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclk`jdefault? disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault? disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault? disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclk`jdefault? disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclk`jdefault? disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault? disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault? disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclk`jdefault? disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclk`jdefault? disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe" Z l okayDphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe% Z l  disabledDphy@fe870000,rockchip,rk3568-csi-dphyypclk apb  disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  apbokayDSmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  apb disabledDZusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy0_480m  okayDhost-port okay Dotg-port okayDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy1_480m   disabledhost-port  disabledDotg-port  disabledDpinctrl,rockchip,rk3568-pinctrl _ xDgpio@fdd60000,rockchip,gpio-bank !.    D"gpio@fe740000,rockchip,gpio-bankt "cd   gpio@fe750000,rockchip,gpio-banku #ef  @  gpio@fe760000,rockchip,gpio-bankv $gh  `  Dgpio@fe770000,rockchip,gpio-bankw %ij   Dpcfg-pull-up Dpcfg-pull-none Dpcfg-pull-none-drv-level-1  Dpcfg-pull-none-drv-level-2  Dpcfg-pull-none-drv-level-3  Dpcfg-pull-up-drv-level-1  Dpcfg-pull-up-drv-level-2  Dpcfg-pull-none-smt  Dacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 D cpuebcedpdpemmcemmc-rstnout Doemmc-bus8   Dkemmc-clk Dlemmc-cmd Dmemmc-datastrobe Dneth0eth1flashfspifspi-pins` Djgmac0gmac1gpuhdmitxhdmitxm0-cec D[i2c0i2c0-xfer   D!i2c1i2c1-xfer   Di2c2i2c2m0-xfer  Di2c3i2c3m0-xfer Di2c4i2c4m0-xfer   Di2c5i2c5m1-xfer Di2s1i2s1m0-lrcktx Dri2s1m0-mclk D#i2s1m0-sclktx Dqi2s1m0-sdi0  Dsi2s1m0-sdo0 Dti2s2i2s2m0-lrcktx Dvi2s2m0-sclktx Dui2s2m0-sdi Dwi2s2m0-sdo Dxi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Dypdmm0-clk1 Dzpdmm0-sdi0  D{pdmm0-sdi1  D|pdmm0-sdi2  D}pdmm0-sdi3 D~pmicpmic-int-l D$pmupwm0pwm0m0-pins D*pwm1pwm1m0-pins D+pwm2pwm2m0-pins D,pwm3pwm3-pins D-pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins  Dpwm9pwm9m0-pins  Dpwm10pwm10m0-pins  Dpwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Dasdmmc0-clk Dbsdmmc0-cmd Dcsdmmc0-det Ddsdmmc1sdmmc1-bus4@ Dfsdmmc1-clk Dhsdmmc1-cmd Dgsdmmc2sdmmc2m1-bus4@ DIsdmmc2m1-clk DKsdmmc2m1-cmd DJsdmmc2m1-det DLspdifspdifm0-tx Dspi0spi0m0-pins0  Dspi0m0-cs0 Dspi0m0-cs1 Dspi1spi1m0-pins0  Dspi1m0-cs0 Dspi1m0-cs1 Dspi2spi2m0-pins0 Dspi2m0-cs0 Dspi2m0-cs1 Dspi3spi3m0-pins0   Dspi3m0-cs0 Dspi3m0-cs1 Dtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D)uart1uart1m0-xfer   Duart1m0-ctsn Duart1m0-rtsn  Duart2uart2m0-xfer Duart3uart3m0-xfer Duart4uart4m0-xfer Duart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2audio-amplifierspk-amp-enable-h Dgpio-controlbtn-pins-ctrl Dbtn-pins-vol Dgpio-lcdlcd-rst DXgpio-ledsled-pins0   Dhp-detecthp-det Dsdio-pwrseqwifi-enable-h Dusbvcc5v0-host-en Dvcc5v0-otg-en vcc-lcdvcc-lcd-en Dvcc-wifivcc-wifi-h Dchosen serial2:1500000n8adc-joystick ,adc-joystick ( 4< axis@0 B K T ^axis@1 B K T ^axis@2 B K T ^axis@3 B K T ^backlight,pwm-backlight i% vaDVbattery,simple-battery {=    A cx ,?$ I3@ f {?$d>M8_=xZ=U=~0P=W K= pF<A<0<;7;,p2:h-:(:aP#99~88F@7@ 663@D'gpio-keys-control ,gpio-keys`jdefaultbutton-a  EAST ^1button-b  SOUTH ^0button-down  DPAD-DOWN ^!button-l1  TL ^6button-l2  TL2 ^8button-left  DPAD-LEFT ^"button-right  DPAD-RIGHT ^#button-select  SELECT ^:button-start  START ^;button-thumbl  THUMBL ^=button-thumbr  THUMBR ^>button-r1  TR ^7button-r2  TR2 ^9button-up  DPAD-UP ^ button-x  NORTH ^3button-y  WEST ^4gpio-keys-vol ,gpio-keys `jdefaultbutton-voldown  VOLUMEDOWN ^rbutton-volup  VOLUMEUP ^sgpio-leds ,gpio-ledsjdefault`led-0  off   statusled-1  on   powerled-2   charginghdmi-con,hdmi-connector\cportendpointD^sdio-pwrseq,mmc-pwrseq-simple ext_clock`jdefault  "Desound,simple-audio-card`jdefault rk817_ext i2s C MicrophoneMic JackHeadphoneHeadphonesSpeakerInternal Speakers (MICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPOR BInternal Speakerssimple-audio-card,codecsimple-audio-card,cpuaudio-amplifier,simple-audio-amplifier M`jdefault aSpeaker AmpDregulator-vcc5v0-host,regulator-fixed s `jdefault vcc5v0_host&Dregulator-vcc-lcd,regulator-fixed s "`jdefault2Z2Zvcc_lcdDWregulator-vcc-sys,regulator-fixed99vcc_sysD%regulator-vcc-wifi,regulator-fixed "`jdefault2Z2Z vcc_wifiDi interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfwakeup-source#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightiovcc-supplyreset-gpiosrotationddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablevmmc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathio-channelspoll-intervalabs-flatabs-fuzzabs-rangelinux,codepower-supplypwmscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0labelautorepeatcolordefault-statefunctionpost-power-on-delay-mssimple-audio-card,aux-devssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessound-name-prefixenable-active-high