8( 2radxa,rockpi4a-plusradxa,rockpi4rockchip,rk3399 +7Radxa ROCK Pi 4A+aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/ethernet@fe300000/mmc@fe330000/mmc@fe320000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid) 9 D Xcpu@1cpuarm,cortex-a53pscid) 9 D Xcpu@2cpuarm,cortex-a53pscid) 9 D Xcpu@3cpuarm,cortex-a53pscid) 9 D Xcpu@100cpuarm,cortex-a72psci ) 9 DXthermal-idle`'lcpu@101cpuarm,cortex-a72psci ) 9 DXthermal-idle`'lidle-states|pscicpu-sleeparm,idle-statexlX cluster-sleeparm,idle-statelX display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledDpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clock*n6:xin24mMXpcie@f8000000rockchip,rk3399-pcie Zaxi-baseapb-basepci+du Gaclkaclk-perfhclkpm0123syslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay default'7Ginterrupt-controllerWdXpcie-ep@f8000000rockchip,rk3399-pcie-ep Zapb-basemem-base Gaclkaclk-perfhclkpml8(coremgmtmgmt-stickypipepmpclkaclk ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3z default disabledethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokay input!rgmiidefault" # ,'PA(Jmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@Sр Mbiuciuciu-driveciu-sampleayreset disabled+l*v$default %&'mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@ASр  Lbiuciuciu-driveciu-sampleazresetokayl (default)*+,mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13  N Nclk_xinclk_ahb:emmc_cardclockM- phy_arasan"okaySрl3Xusb@fe380000 generic-ehci8./usbokayusb@fe3a0000 generic-ohci:./usbokayusb@fe3c0000 generic-ehci<01usbokayusb@fe3e0000 generic-ohci> 01usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendBhost23usb2-phyusb3-phy Jutmi_wideSkokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendBhost45usb2-phyusb3-phy Jutmi_wideSkokaydp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf67 HJspdifdptxapbcore disabledportsport+endpoint@08Xendpoint@19Xinterrupt-controller@fee00000 arm,gic-v3d+WP  Xmsi-controller@fee20000arm,gic-v3-its Xppi-partitionsinterrupt-partition-0#Xinterrupt-partition-1#Xsaradc@ff100000rockchip,rk3399-saradc>,Pesaradcapb_pclk saradc-apbokay>crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default:+okayJ,acodec@11everest,es8316Ymclk;<default =portendpoint>Xi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default?+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default@+okayJaXi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&defaultA+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%defaultB+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$defaultC+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcydefault DEF disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbydefaultG disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdydefaultHokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeydefaultI disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDJ J txrxdefaultKLMN+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5J J txrxdefaultOPQR+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4JJtxrxdefaultSTUV+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCJJtxrxdefaultWXYZ+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk[[ txrxdefault\]^_+ disabledthermal-zonescpu-thermald`tripscpu_alert0ppassiveXacpu_alert1$passiveXbcpu_crits criticalcooling-mapsmap0amap1bHgpu-thermald`tripsgpu_alert0$passiveXcgpu_crits criticalcooling-mapsmap0c dtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbsinitdefaultsleepefe)okay?VX`qos@ffa58000rockchip,rk3399-qossyscon Xnqos@ffa5c000rockchip,rk3399-qossyscon Xoqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Xrqos@ffa70080rockchip,rk3399-qossyscon Xsqos@ffa74000rockchip,rk3399-qossyscon@ Xpqos@ffa76000rockchip,rk3399-qossyscon` Xqqos@ffa90000rockchip,rk3399-qossyscon Xtqos@ffa98000rockchip,rk3399-qossyscon Xgqos@ffaa0000rockchip,rk3399-qossyscon Xuqos@ffaa0080rockchip,rk3399-qossyscon Xvqos@ffaa8000rockchip,rk3399-qossyscon Xwqos@ffaa8080rockchip,rk3399-qossyscon Xxqos@ffab0000rockchip,rk3399-qossyscon Xhqos@ffab0080rockchip,rk3399-qossyscon Xiqos@ffab8000rockchip,rk3399-qossyscon Xjqos@ffac0000rockchip,rk3399-qossyscon Xkqos@ffac0080rockchip,rk3399-qossyscon Xlqos@ffac8000rockchip,rk3399-qossyscon Xyqos@ffac8080rockchip,rk3399-qossyscon Xzqos@ffad0000rockchip,rk3399-qossyscon X{qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Xmpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerq+Xpower-domain@34"gqpower-domain@33!hiqpower-domain@31jqpower-domain@32  klqpower-domain@35#mqpower-domain@25lqpower-domain@23nqpower-domain@22foqpower-domain@27Lpqpower-domain@28qqpower-domain@8~}qpower-domain@9 qpower-domain@24rsqpower-domain@15q+power-domain@21rtqpower-domain@19uvqpower-domain@20wxqpower-domain@16q+power-domain@17yzqpower-domain@18{qsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Xio-domains&rockchip,rk3399-pmu-io-voltage-domainokay|spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5}}spiclkapb_pclk<default~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7}}"baudclkapb_pclkfydefault disabledi2c@ff3c0000rockchip,rk3399-i2c<}  } } i2cpclk9default+okay*Japmic@1brockchip,rk808 =M:xin32krk808-clkout2default*7DQXregulatorsDCDC_REG1 ^vdd_centerm qpqregulator-state-memDCDC_REG2 ^vdd_cpu_lm qpqX regulator-state-memDCDC_REG3^vcc_ddrmregulator-state-memDCDC_REG4^vcc_1v8mw@w@Xregulator-state-mem w@LDO_REG1^vcca1v8_codecmw@w@Xregulator-state-memLDO_REG2 ^vcca1v8_hdmimw@w@Xregulator-state-memLDO_REG3 ^vcca_1v8mw@w@regulator-state-mem w@LDO_REG4 ^vcc_sdiom--Xregulator-state-mem -LDO_REG5^vcca3v0_codecm--regulator-state-memLDO_REG6^vcc_1v5m``regulator-state-mem `LDO_REG7 ^vcca0v9_hdmim  Xregulator-state-memLDO_REG8^vcc_3v0m--X|regulator-state-mem -SWITCH_REG1^vcc_cammregulator-state-memSWITCH_REG2 ^vcc_mipimregulator-state-memregulator@40silergy,syr827@ %default ^vdd_cpu_b 4`m BX regulator-state-memregulator@41silergy,syr828A %default^vdd_gpu 4`m BXregulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=}  } } i2cpclk8default+okayJXai2c@ff3e0000rockchip,rk3399-i2c>}  } } i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB Mdefault} disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB Mdefault} disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  Mdefault}okayXpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 Mdefault} disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monXvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclk Xiommu@ff650800rockchip,iommue@s aclkiface _Xvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore X iommu@ff660480rockchip,iommu f@f@u aclkiface  _Xiommu@ff670800rockchip,iommug@* aclkiface _ disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  l w apb_pclkX[dma-controller@ff6e0000arm,pl330arm,primecelln@  l w apb_pclkXJclock-controller@ff750000rockchip,rk3399-pmucruuxin24mM }(JX}clock-controller@ff760000rockchip,rk3399-cruvxin24mM @BCxD#g/;рxh<4`#Fׄׄ ׄXsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+Xio-domains"rockchip,rk3399-io-voltage-domainokay  | | mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf  disabledXusb2phy@e450rockchip,rk3399-usb2phyP{phyclkM:clk_usbphy0_480mokayX.host-port  linestateokayX/otg-port 0ghjotg-bvalidotg-idlinestateokayX2usb2phy@e460rockchip,rk3399-usb2phy`|phyclkM:clk_usbphy1_480mokayX0host-port  linestateokayX1otg-port 0lmootg-bvalidotg-idlinestateokayX4phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okayX-pcie-phyrockchip,rk3399-pcie-phyrefclk phyokayXphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphyokaydp-port X6usb3-port X3phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphyokaydp-port X7usb3-port X5watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB[tx mclkhclkUdefault disabledportXendpointXi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'[[txrxi2s_clki2s_hclkVbclk_onbclk_offokay  portXendpoint &i2s 1X>i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s([[txrxi2s_clki2s_hclkWdefault disabled  i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)[[txrxi2s_clki2s_hclkXokayXvop@ff8f0000rockchip,rk3399-vop-lit wׄaclk_vopdclk_vophclk_vop X axiahbdclkokayport+Xendpoint@0Xendpoint@1Xendpoint@2Xendpoint@3Xendpoint@4X9iommu@ff8f3f00rockchip,iommu?w aclkiface _okayXvop@ff900000rockchip,rk3399-vop-big vׄaclk_vopdclk_vophclk_vop X axiahbdclkokayport+Xendpoint@0Xendpoint@1Xendpoint@2Xendpoint@3Xendpoint@4X8iommu@ff903f00rockchip,iommu?v aclkiface _okayXisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk Xdphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface _ 9Xisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk Xdphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface _ 9Xhdmi-soundsimple-audio-card Ti2s m hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfrefokay   defaultXports+port@0+endpoint@0Xendpoint@1Xport@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0Xendpoint@1Xport@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+  disabledXports+port@0+endpoint@0Xendpoint@1Xport@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0Xendpoint@1Xport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu P#okay DXdpinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankr}  WdX(gpio@ff730000rockchip,gpio-banks}  WdX=gpio@ff780000rockchip,gpio-bankxP  WdXgpio@ff788000rockchip,gpio-bankxQ  WdX#gpio@ff790000rockchip,gpio-bankyR  WdXpcfg-pull-up Xpcfg-pull-down Xpcfg-pull-none Xpcfg-pull-none-12ma  % Xpcfg-pull-none-13ma  % Xpcfg-pull-none-18ma  %pcfg-pull-none-20ma  %Xpcfg-pull-up-2ma  %pcfg-pull-up-8ma  %pcfg-pull-up-18ma  %pcfg-pull-up-20ma  %Xpcfg-pull-down-4ma  %pcfg-pull-down-8ma  %pcfg-pull-down-12ma  % pcfg-pull-down-18ma  %pcfg-pull-down-20ma  %pcfg-output-high 4pcfg-output-low @pcfg-input-enable Kpcfg-input-pull-up K pcfg-input-pull-down K clockclk-32k Xcifcif-clkin X cif-clkouta X edpedp-hpd XXgmacrgmii-pins X    X"rmii-pins X     i2c0i2c0-xfer XXi2c1i2c1-xfer XX:i2c2i2c2-xfer XX?i2c3i2c3-xfer XX@i2c4i2c4-xfer X  Xi2c5i2c5-xfer X  XAi2c6i2c6-xfer X  XBi2c7i2c7-xfer XXCi2c8i2c8-xfer XXi2s0i2s0-2ch-bus` XXi2s0-2ch-bus-bclk-off` XXi2s0-8ch-bus Xi2s0-8ch-bus-bclk-off Xi2s1i2s1-2ch-busP XXi2s1-2ch-bus-bclk-offP Xsdio0sdio0-bus1 Xsdio0-bus4@ XX%sdio0-cmd XX&sdio0-clk XX'sdio0-cd Xsdio0-pwr Xsdio0-bkpwr Xsdio0-wp Xsdio0-int Xsdmmcsdmmc-bus1 Xsdmmc-bus4@ X   X,sdmmc-clk X X)sdmmc-cmd X X+sdmmc-cd XX*sdmmc-wp Xsuspendap-pwroff Xddrio-pwroff Xspdifspdif-bus XXspdif-bus-1 Xspi0spi0-clk XXKspi0-cs0 XXNspi0-cs1 Xspi0-tx XXLspi0-rx XXMspi1spi1-clk X XOspi1-cs0 X XRspi1-rx XXQspi1-tx XXPspi2spi2-clk X XSspi2-cs0 X XVspi2-rx X XUspi2-tx X XTspi3spi3-clk XX~spi3-cs0 XXspi3-rx XXspi3-tx XXspi4spi4-clk XXWspi4-cs0 XXZspi4-rx XXYspi4-tx XXXspi5spi5-clk XX\spi5-cs0 XX_spi5-rx XX^spi5-tx XX]testclktest-clkout0 Xtest-clkout1 Xtest-clkout2 Xtsadcotp-pin XXeotp-out XXfuart0uart0-xfer XXDuart0-cts XXEuart0-rts XXFuart1uart1-xfer X  XGuart2auart2a-xfer X uart2buart2b-xfer Xuart2cuart2c-xfer XXHuart3uart3-xfer XXIuart3-cts Xuart3-rts Xuart4uart4-xfer XXuarthdcpuarthdcp-xfer Xpwm0pwm0-pin XXpwm0-pin-pull-down Xvop0-pwm-pin Xvop1-pwm-pin Xpwm1pwm1-pin XXpwm1-pin-pull-down Xpwm2pwm2-pin XXpwm2-pin-pull-down Xpwm3apwm3a-pin XXpwm3bpwm3b-pin Xhdmihdmi-i2c-xfer Xhdmi-cec XXpciepci-clkreqn-cpm Xpci-clkreqnb-cpm XXpcie-pwr-en XXbtbt-enable-h X bt-host-wake-l Xbt-wake-l Xes8316hp-detect XX;hp-int XX<ledsuser-led2 XXpmicpmic-int-l XXvsel1-pin XXvsel2-pin XXusb-typecvcc5v0-typec-en XXusb2vcc5v0-host-en XXwifiwifi-enable-h X Xwifi-host-wake-l Xchosen fserial2:1500000n8external-gmac-clock fixed-clock*sY@ :clkin_gmacMX leds gpio-ledsdefaultled-0 rstatus { # heartbeatsdio-pwrseqmmc-pwrseq-simplelpodefault ( X$soundaudio-graph-card Analog  =sound-ditaudio-graph-card SPDIF spdif-ditlinux,spdif-ditportendpointXvbus-typec-regulatorregulator-fixed  =default ^vbus_typecm Bdc-12vregulator-fixed ^vcc12v_dcinmXvcc3v3-lan-regulatorregulator-fixed ^vcc3v3_lanm2Z2Z BX!vcc3v3-pcie-regulatorregulator-fixed  default ^vcc3v3_pciem BXvcc3v3-sysregulator-fixed ^vcc3v3_sysm2Z2Z BXvcc5v0-host-regulatorregulator-fixed  default ^vcc5v0_hostm BXvcc-sysregulator-fixed ^vcc5v0_sysmLK@LK@ BXvcc-0v9regulator-fixed^vcc_0v9m   BXvdd-logpwm-regulator a ^vdd_logm 5\opp-table-0operating-points-v2 X opp00 Q 5 @opp01 #F opp02 0, Popp03 < opp04 G opp05 Tfr opp06 ZJ 0opp-table-1operating-points-v2 Xopp00 Q 5 @opp01 #F 5opp02 0, opp03 < Popp04 G opp05 Tfr opp06 _" opp07 kI 0opp08 x) opp-table-2operating-points-v2Xopp00  5opp01 @ 5opp02 ׄ opp03 e Popp04 #F Hopp05 / g8opp-table-3operating-points-v2Xopp00 ׄ opp01 'Z opp02 / opp03 7P( H compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statescpu-supplyoperating-points-v2phandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,capture-channelsrockchip,playback-channelsdai-formatmclk-fsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathfunctioncolorlinux,default-triggerreset-gpioslabeldaishp-det-gpioenable-active-highpwmspwm-supplyopp-sharedopp-hzopp-microvoltclock-latency-ns