I8( Xkhadas,edgerockchip,rk3399 + 7Khadas Edgealiases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci d$ 4 H Scpu@1cpuarm,cortex-a53psci d$ 4 H Scpu@2cpuarm,cortex-a53psci d$ 4 H Scpu@3cpuarm,cortex-a53psci d$ 4 H Scpu@100cpuarm,cortex-a72psci  $ 4 HSthermal-idle['gcpu@101cpuarm,cortex-a72psci  $ 4 HSthermal-idle['gidle-stateswpscicpu-sleeparm,idle-statexgS cluster-sleeparm,idle-stategS display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clock%n65xin24mHSpcie@f8000000rockchip,rk3399-pcie Uaxi-baseapb-basepci+_p| Gaclkaclk-perfhclkpm0123syslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38݂8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controller_Spcie-ep@f8000000rockchip,rk3399-pcie-ep Uapb-basemem-base Gaclkaclk-perfhclkpm 8(coremgmtmgmt-stickypipepmpclkaclk ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3$ BdefaultP disabledethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macZ stmmacethhu disabledinputrgmiiBdefaultP  'P( mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sample#Zyresetokay.8EVlwBdefault P !"#$+wifi@1brcm,bcm4329-fmac % host-wakeBdefaultP&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр  Lbiuciuciu-driveciu-sample#Zzresetokay.E %Bdefault P'()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahb5emmc_cardclockH* phy_arasanZokay."wSusb@fe380000 generic-ehci8+,usbokayusb@fe3a0000 generic-ohci:+,usbokayusb@fe3c0000 generic-ehci<-.usbokayusb@fe3e0000 generic-ohci> -.usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspend1otg/0usb2-phyusb3-phy 9utmi_wideBZ{Zokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspend1host12usb2-phyusb3-phy 9utmi_wideBZ{Zokaydp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf34Z HJspdifdptxapbcoreh disabledportsport+endpoint@05Sendpoint@16Sinterrupt-controller@fee00000 arm,gic-v3_+P  Smsi-controller@fee20000arm,gic-v3-itsSppi-partitionsinterrupt-partition-0Sinterrupt-partition-1Ssaradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokay-#Scrypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;BdefaultP7+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#BdefaultP8+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"BdefaultP9+okay9PSi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&BdefaultP:+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%BdefaultP;+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$BdefaultP<+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkchrBdefault P=>?okaybluetoothbrcm,bcm43438-bt@lpo A % A= Bdefault PBCDEFserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbhrBdefaultPG disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdhrBdefaultPHokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkehrBdefaultPI disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDJ J txrxBdefaultPKLMN+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5J J txrxBdefaultPOPQR+okayflash@0 winbond,w25q128fwjedec,spi-nor2spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4JJtxrxBdefaultPSTUV+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCJJtxrxBdefaultPWXYZ+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk[[ txrxBdefaultP\]^_Z+ disabledthermal-zonescpu-thermald`tripscpu_alert0,p8passiveSacpu_alert1,$8passiveSbcpu_crit,s8 criticalcpu_warm,8activeSccpu_hot,8activeSecooling-mapsmap0CaHmap1CbHHmap2Cc Hdmap3Ce Hdgpu-thermald`tripsgpu_alert0,$8passiveSfgpu_crit,s8 criticalgpu_warm,8activeShgpu_hot,8activeSicooling-mapsmap0Cf Hgmap1Ch Hdmap2Ci Hdtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbhWsBinitdefaultsleepPjnkxjokayS`qos@ffa58000rockchip,rk3399-qossyscon Ssqos@ffa5c000rockchip,rk3399-qossyscon Stqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Swqos@ffa70080rockchip,rk3399-qossyscon Sxqos@ffa74000rockchip,rk3399-qossyscon@ Suqos@ffa76000rockchip,rk3399-qossyscon` Svqos@ffa90000rockchip,rk3399-qossyscon Syqos@ffa98000rockchip,rk3399-qossyscon Slqos@ffaa0000rockchip,rk3399-qossyscon Szqos@ffaa0080rockchip,rk3399-qossyscon S{qos@ffaa8000rockchip,rk3399-qossyscon S|qos@ffaa8080rockchip,rk3399-qossyscon S}qos@ffab0000rockchip,rk3399-qossyscon Smqos@ffab0080rockchip,rk3399-qossyscon Snqos@ffab8000rockchip,rk3399-qossyscon Soqos@ffac0000rockchip,rk3399-qossyscon Spqos@ffac0080rockchip,rk3399-qossyscon Sqqos@ffac8000rockchip,rk3399-qossyscon S~qos@ffac8080rockchip,rk3399-qossyscon Sqos@ffad0000rockchip,rk3399-qossyscon Sqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Srpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+Spower-domain@34"lpower-domain@33!mnpower-domain@31opower-domain@32  pqpower-domain@35#rpower-domain@25lpower-domain@23spower-domain@22ftpower-domain@27Lupower-domain@28vpower-domain@8~}power-domain@9 power-domain@24wxpower-domain@15+power-domain@21rypower-domain@19z{power-domain@20|}power-domain@16+power-domain@17~power-domain@18syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Sio-domains&rockchip,rk3399-pmu-io-voltage-domainokayFspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk<BdefaultP+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkfhrBdefaultP disabledi2c@ff3c0000rockchip,rk3399-i2c<    i2cpclk9BdefaultP+ disabledi2c@ff3d0000rockchip,rk3399-i2c=    i2cpclk8BdefaultP+okay%9Ppmic@1brockchip,rk808 H5xin32krk808-clkout2BdefaultP#E/E;EGESE_EkEwEEEEFS@regulatorsDCDC_REG1 vdd_center qp qregulator-state-mem $DCDC_REG2 vdd_cpu_l qp qS regulator-state-mem $DCDC_REG3vcc_ddrregulator-state-mem =DCDC_REG4vcc_1v8w@w@SFregulator-state-mem = Uw@LDO_REG1 vcc1v8_apio2w@w@Sregulator-state-mem $LDO_REG2 vcc_vldo2--regulator-state-mem $LDO_REG3vcc1v8_pmupllw@w@regulator-state-mem = Uw@LDO_REG4 vccio_sdw@-S$regulator-state-mem = U-LDO_REG5 vcc_vldo5--regulator-state-mem $LDO_REG6vcc_1v5``regulator-state-mem = U`LDO_REG7 vcc1v8_codecw@w@Sregulator-state-mem $LDO_REG8vcc_3v0--Sregulator-state-mem = U-SWITCH_REG1 vcc3v3_s3Sregulator-state-mem $SWITCH_REG2 vcc3v3_s0regulator-state-mem $regulator@40silergy,syr827@ qBdefaultP vdd_cpu_b 4`  ESregulator-state-mem $regulator@41silergy,syr828A qBdefaultPvdd_gpu 4`  ESregulator-state-mem $i2c@ff3e0000rockchip,rk3399-i2c>    i2cpclk:BdefaultP+okay%9Ppwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB BdefaultPokaySpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB BdefaultP disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  BdefaultPokaySpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 BdefaultP disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monSvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclk Ziommu@ff650800rockchip,iommue@s aclkiface ZSvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore Z iommu@ff660480rockchip,iommu f@f@u aclkifaceZ  Siommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahbZ!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclkS[dma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkSJclock-controller@ff750000rockchip,rk3399-pmucruuxin24mhH (JSclock-controller@ff760000rockchip,rk3399-cruvxin24mhH @BCxD#g/;рxh<4`#Fׄׄ ׄSsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+Sio-domains"rockchip,rk3399-io-voltage-domainokay   $ mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrfZ  disabledSusb2phy@e450rockchip,rk3399-usb2phyP{phyclkH5clk_usbphy0_480mokayS+host-port  linestateokayS,otg-port 0ghjotg-bvalidotg-idlinestateokayS/usb2phy@e460rockchip,rk3399-usb2phy`|phyclkH5clk_usbphy1_480mokayS-host-port  linestateokayS.otg-port 0lmootg-bvalidotg-idlinestateokayS1phy@f780rockchip,rk3399-emmc-phy$emmcclk )2 okayS*pcie-phyrockchip,rk3399-pcie-phyrefclk phy disabledSphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~ZLuphyuphy-pipeuphy-tcphyhokaydp-port S3usb3-port S0phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refZ Muphyuphy-pipeuphy-tcphyhokaydp-port S4usb3-port S2watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB[tx mclkhclkUBdefaultPZ disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sh'[[txrxi2s_clki2s_hclkVBbclk_onbclk_offPnZokay = Xi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s([[txrxi2s_clki2s_hclkWBdefaultPZokay = Xi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)[[txrxi2s_clki2s_hclkXZokaySvop@ff8f0000rockchip,rk3399-vop-lit wׄaclk_vopdclk_vophclk_vop Z axiahbdclkokayport+Sendpoint@0Sendpoint@1Sendpoint@2Sendpoint@3Sendpoint@4S6iommu@ff8f3f00rockchip,iommu?w aclkifaceZ okaySvop@ff900000rockchip,rk3399-vop-big vׄaclk_vopdclk_vophclk_vop Z axiahbdclkokayport+Sendpoint@0Sendpoint@1Sendpoint@2Sendpoint@3Sendpoint@4S5iommu@ff903f00rockchip,iommu?v aclkifaceZ okaySisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk dphyZ disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface Z rSisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk dphyZ disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface Z rShdmi-soundsimple-audio-card i2s  hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmir(tqpoiahbisfrcecgrfrefZhokay BdefaultPSports+port@0+endpoint@0Sendpoint@1Sport@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfZapbh+ disabledports+port@0+endpoint@0Sendpoint@1Sport@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfZapbh+  disabledSports+port@0+endpoint@0Sendpoint@1Sport@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfBdefaultPZdph disabledports+port@0+endpoint@0Sendpoint@1Sport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu PZ#okay4 Sgpinctrlrockchip,rk3399-pinctrlh+gpio@ff720000rockchip,gpio-bankr  _S%gpio@ff730000rockchip,gpio-banks  _Sgpio@ff780000rockchip,gpio-bankxP  _SAgpio@ff788000rockchip,gpio-bankxQ  _Sgpio@ff790000rockchip,gpio-bankyR  _Spcfg-pull-up Spcfg-pull-down "Spcfg-pull-none 1Spcfg-pull-none-12ma 1 Spcfg-pull-none-13ma 1 Spcfg-pull-none-18ma 1pcfg-pull-none-20ma 1pcfg-pull-up-2ma pcfg-pull-up-8ma pcfg-pull-up-18ma pcfg-pull-up-20ma pcfg-pull-down-4ma "pcfg-pull-down-8ma "pcfg-pull-down-12ma " pcfg-pull-down-18ma "pcfg-pull-down-20ma "pcfg-output-high >pcfg-output-low Jpcfg-input-enable Upcfg-input-pull-up U pcfg-input-pull-down U "clockclk-32k bcifcif-clkin b cif-clkouta b edpedp-hpd bSgmacrgmii-pins b    Srmii-pins b     i2c0i2c0-xfer bSi2c1i2c1-xfer bS7i2c2i2c2-xfer bS8i2c3i2c3-xfer bS9i2c4i2c4-xfer b  Si2c5i2c5-xfer b  S:i2c6i2c6-xfer b  S;i2c7i2c7-xfer bS<i2c8i2c8-xfer bSi2s0i2s0-2ch-bus` bi2s0-2ch-bus-bclk-off` bi2s0-8ch-bus bSi2s0-8ch-bus-bclk-off bSi2s1i2s1-2ch-busP bSi2s1-2ch-bus-bclk-offP bsdio0sdio0-bus1 bsdio0-bus4@ bS sdio0-cmd bS!sdio0-clk bS"sdio0-cd bsdio0-pwr bsdio0-bkpwr bsdio0-wp bsdio0-int bsdmmcsdmmc-bus1 bsdmmc-bus4@ b   S)sdmmc-clk b S'sdmmc-cmd b S(sdmmc-cd bsdmmc-wp bsuspendap-pwroff bddrio-pwroff bspdifspdif-bus bSspdif-bus-1 bspi0spi0-clk bSKspi0-cs0 bSNspi0-cs1 bspi0-tx bSLspi0-rx bSMspi1spi1-clk b SOspi1-cs0 b SRspi1-rx bSQspi1-tx bSPspi2spi2-clk b SSspi2-cs0 b SVspi2-rx b SUspi2-tx b STspi3spi3-clk bSspi3-cs0 bSspi3-rx bSspi3-tx bSspi4spi4-clk bSWspi4-cs0 bSZspi4-rx bSYspi4-tx bSXspi5spi5-clk bS\spi5-cs0 bS_spi5-rx bS^spi5-tx bS]testclktest-clkout0 btest-clkout1 btest-clkout2 btsadcotp-pin bSjotp-out bSkuart0uart0-xfer bS=uart0-cts bS?uart0-rts bS>uart1uart1-xfer b  SGuart2auart2a-xfer b uart2buart2b-xfer buart2cuart2c-xfer bSHuart3uart3-xfer bSIuart3-cts buart3-rts buart4uart4-xfer bSuarthdcpuarthdcp-xfer bpwm0pwm0-pin bSpwm0-pin-pull-down bvop0-pwm-pin bvop1-pwm-pin bpwm1pwm1-pin bSpwm1-pin-pull-down bpwm2pwm2-pin bSpwm2-pin-pull-down bpwm3apwm3a-pin bSpwm3bpwm3b-pin bhdmihdmi-i2c-xfer bhdmi-cec bSpciepci-clkreqn-cpm bpci-clkreqnb-cpm bSbtbt-host-wake-l bSCbt-reg-on-h bSBbt-wake-l bSDbuttonspwrbtn bSirir-rx bSledssys-led-pin bSuser-led-pin bSpmicpmic-int-l bScpu-b-sleep b Sgpu-sleep b Ssdio-pwrseqwifi-enable-h bSusb2vcc5v0-host-en bSwifiwifi-host-wake-l bS&opp-table-0operating-points-v2 pS opp00 {Q  @opp01 {#F opp02 {0, P Popp03 {< HHopp04 {G B@B@opp05 {Tfr **opp-table-1operating-points-v2 pS opp00 {Q  @opp01 {#F opp02 {0, opp03 {< Y Yopp04 {G ~~opp05 {Tfr opp06 {_" opp07 {kI OOopp-table-2operating-points-v2Sopp00 {  0opp01 {@ 0opp02 {ׄ 0opp03 {e Y Y0opp04 {#F HH0opp05 {/ 0chosen serial2:1500000n8external-gmac-clock fixed-clock%sY@ 5clkin_gmacHSsdio-pwrseqmmc-pwrseq-simple@ ext_clockBdefaultP ASvcc1v8-s3regulator-fixed vcc1v8_s3w@w@ FS#vcc3v3-pcie-regulatorregulator-fixed vcc3v3_pcie2Z2Z Evcc5v0-host-regulatorregulator-fixed  BdefaultP vcc5v0_host Svdd-logpwm-regulator a Evdd_log 5\vsysregulator-fixedvsysSvsys-3v3regulator-fixed vsys_3v32Z2Z SEvsys-5v0regulator-fixed vsys_5v0LK@LK@ Sadc-keys adc-keys  buttons w@ dbutton-recovery !Recovery 'h 2FPgpio-keys gpio-keys LBdefaultPkey-power Wd % !GPIO Key Power 'tir-receivergpio-ir-receiver  irc-khadasBdefaultPleds gpio-ledsBdefaultPled-0 !sys_led {heartbeat %led-1 !user_led off pwm-fanpwm-fan   @Sd compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vqmmc-supplyvmmc-supplybrcm,drive-strengthassigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disableoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwmspwm-supplyio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltautorepeatdebounce-intervallinux,rc-map-namelinux,default-triggerdefault-statecooling-levelsfan-supply