p8(%google,scarlet-rev15-sku0google,scarlet-rev15google,scarlet-rev14-sku0google,scarlet-rev14google,scarlet-rev13-sku0google,scarlet-rev13google,scarlet-rev12-sku0google,scarlet-rev12google,scarlet-rev11-sku0google,scarlet-rev11google,scarlet-rev10-sku0google,scarlet-rev10google,scarlet-rev9-sku0google,scarlet-rev9google,scarlet-rev8-sku0google,scarlet-rev8google,scarlet-rev7-sku0google,scarlet-rev7google,scarlet-rev6-sku0google,scarlet-rev6google,scarlet-rev5-sku0google,scarlet-rev5google,scarletgoogle,grurockchip,rk3399 +7tabletDGoogle ScarletaliasesJ/pinctrl/gpio@ff720000P/pinctrl/gpio@ff730000V/pinctrl/gpio@ff780000\/pinctrl/gpio@ff788000b/pinctrl/gpio@ff790000h/i2c@ff3c0000m/i2c@ff110000r/i2c@ff120000w/i2c@ff130000|/i2c@ff3d0000/i2c@ff140000/i2c@ff150000/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid, < P [cpu@1cpuarm,cortex-a53pscid, < P [cpu@2cpuarm,cortex-a53pscid, < P [cpu@3cpuarm,cortex-a53pscid, < P [cpu@100cpuarm,cortex-a72psci , < P[thermal-idlec'ocpu@101cpuarm,cortex-a72psci , < P[thermal-idlec'oidle-statespscicpu-sleeparm,idle-statexo[ cluster-sleeparm,idle-stateo[ display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clkokay< (3Oj@'Z'Z'Z;!7P(Cpmu_a53arm,cortex-a53-pmuQpmu_a72arm,cortex-a72-pmuQpsci arm,psci-1.0smctimerarm,armv8-timer@Q   \xin24m fixed-clocksn6xin24m[pcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0Q123syslegacyclient` ,!pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38+82(9coremgmtmgmt-stickypipepmpclkaclkokay ENdefault\fvinterrupt-controller[pcie@0,0++pciwifi@0,0 qcom,ath10k( GO_DUMOpcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm82(9coremgmtmgmt-stickypipepmpclkaclk ,!pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 Ndefault\ disabledethernet@fe300000rockchip,rk3399-gmac0Q macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac 2 9stmmaceth"!/ disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@Q@:р Mbiuciuciu-driveciu-sampleH 2y9reset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@QA:рSc  Lbiuciuciu-driveciu-sampleH 2z9resetokayNdefault\"#$%&x ' ()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13Q !SNcрNclk_xinclk_ahbemmc_cardclock* !phy_arasan okayx.=W[usb@fe380000 generic-ehci8Q+,!usb disabledusb@fe3a0000 generic-ohci:Q+,!usbokay+bluetooth@1usbcf3,e300usb4ca,301aNdefault\- 'Qwakeupusb@fe3c0000 generic-ehci<Q./!usb disabledusb@fe3e0000 generic-ohci>Q ./!usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3++0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk2% 9usb3-otgokaye0usb@fe800000 snps,dwc3Qirefbus_earlysuspendlhost12!usb2-phyusb3-phy tutmi_wide} okayusb@fe900000rockchip,rk3399-dwc3++0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk2& 9usb3-otg disabledusb@fe900000 snps,dwc3Qnrefbus_earlysuspendlotg34!usb2-phyusb3-phy tutmi_wide}  disableddp@fec00000rockchip,rk3399-cdn-dpQ Src  ruocore-clkpclkspdifgrf5  2HJ9spdifdptxapbcore"!okaye0[portsport+endpoint@0#6[endpoint@1#7[interrupt-controller@fee00000 arm,gic-v3++P Q [msi-controller@fee20000arm,gic-v3-its3B[ppi-partitionsinterrupt-partition-0M[interrupt-partition-1M[saradc@ff100000rockchip,rk3399-saradcQ>VPesaradcapb_pclk2 9saradc-apb disabledcrypto@ff8b0000rockchip,rk3399-crypto@Qhclk_masterhclk_slavesclk29masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@Qhclk_masterhclk_slavesclk29masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cSAc AU i2cpclkQ;Ndefault\8+ disabledi2c@ff120000rockchip,rk3399-i2cSBc BV i2cpclkQ#Ndefault\9+okaysh2,digitizer@9 hid-over-i2c  'QNdefault\:;i2c@ff130000rockchip,rk3399-i2cSCc CW i2cpclkQ"Ndefault\<+okaysh2,touchscreen@10elan,ekth3500 'QNdefault\=>  i2c@ff140000rockchip,rk3399-i2cSDc DX i2cpclkQ&Ndefault\?+ disabledi2c@ff150000rockchip,rk3399-i2cSEc EY i2cpclkQ%Ndefault\@+ disabledi2c@ff160000rockchip,rk3399-i2cSFc FZ i2cpclkQ$Ndefault\AB+okaysh2,camera@36 ovti,ov56956Ndefault\CxvclkDE Fportendpoint#G[camera@3c ovti,ov2685<Ndefault\HxvclkD Fportendpoint#I[serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkQcNdefault\J disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkQbNdefault\K disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkQdNdefault\Lokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkQeNdefault\M disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkQDN N txrxNdefault\OPQR+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclkQ5N N txrxNdefaultsleep\STUV+okayWflash@0jedec,spi-norspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclkQ4NNtxrxNdefault\XYZ[+okaytpm@0 google,cr50 'QNdefault\\ 5spi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkQCNNtxrxNdefault\]^_`+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkQaa txrxNdefault\bcde +okayec@0google,cros-ec-spi 'QNdefault\f-i2c-tunnelgoogle,cros-ec-i2c-tunnel$+sbs-battery@bsbs,sbs-battery 6Jextcon0google,extcon-usbc-cros-ec_[0keyboard-controllergoogle,cros-ec-keybr D;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ithermal-zonescpu-thermaldgtripscpu_alert0?passive[hcpu_alert1X?passive[icpu_crits ?criticalcooling-mapsmap0 h map1 iH gpu-thermaldgtripsgpu_alert0$?passive[jgpu_crits ?criticalcooling-mapsmap0 j ktsadc@ff260000rockchip,rk3399-tsadc&QaSOc qOdtsadcapb_pclk2 9tsadc-apb"! sNinitdefaultsleep\lm 2l <okay R i[gqos@ffa58000rockchip,rk3399-qossyscon [uqos@ffa5c000rockchip,rk3399-qossyscon [vqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon [yqos@ffa70080rockchip,rk3399-qossyscon [zqos@ffa74000rockchip,rk3399-qossyscon@ [wqos@ffa76000rockchip,rk3399-qossyscon` [xqos@ffa90000rockchip,rk3399-qossyscon [{qos@ffa98000rockchip,rk3399-qossyscon [nqos@ffaa0000rockchip,rk3399-qossyscon [|qos@ffaa0080rockchip,rk3399-qossyscon [}qos@ffaa8000rockchip,rk3399-qossyscon [~qos@ffaa8080rockchip,rk3399-qossyscon [qos@ffab0000rockchip,rk3399-qossyscon [oqos@ffab0080rockchip,rk3399-qossyscon [pqos@ffab8000rockchip,rk3399-qossyscon [qqos@ffac0000rockchip,rk3399-qossyscon [rqos@ffac0080rockchip,rk3399-qossyscon [sqos@ffac8000rockchip,rk3399-qossyscon [qos@ffac8080rockchip,rk3399-qossyscon [qos@ffad0000rockchip,rk3399-qossyscon [qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon [tpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller +[ power-domain@34" n power-domain@33! op power-domain@31 q power-domain@32   rs power-domain@35# t power-domain@25l power-domain@23 u power-domain@22f v power-domain@27L w power-domain@28 x power-domain@8~} power-domain@9  power-domain@24 yz power-domain@15 +power-domain@21r { power-domain@19 |} power-domain@20 ~ power-domain@16 +power-domain@17  power-domain@18  syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2[io-domains&rockchip,rk3399-pmu-io-voltage-domainokay spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclkQ<Ndefault\+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkQfNdefault\ disabledi2c@ff3c0000rockchip,rk3399-i2c<S c   i2cpclkQ9Ndefault\+ disabledi2c@ff3d0000rockchip,rk3399-i2c=S c   i2cpclkQ8Ndefault\+ disabledi2c@ff3e0000rockchip,rk3399-i2c>S c   i2cpclkQ:Ndefault\+okaysh2,da7219@1a dlg,da7219 'QYmclk ( diffNdefault\   [da7219_aad   2  0 A32ms_64ms S d  t ! >pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB Ndefault\okay[pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB Ndefault\okay[pwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  Ndefault\okay[pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 Ndefault\okay[dfi@ff630000c@rockchip,rk3399-dfiQy pclk_ddr_monokay[video-codec@ff650000rockchip,rk3399-vpue Qrq vepuvdpu aclkhclk  iommu@ff650800rockchip,iommue@Qs aclkiface  [video-codec@ff660000rockchip,rk3399-vdecfQt axiahbcabaccore  iommu@ff660480rockchip,iommu f@f@Qu aclkiface  [iommu@ff670800rockchip,iommug@Q* aclkiface  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S@BCxDc#F_^;рxh<4`/ׄ ׄׄ[syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+[!io-domains"rockchip,rk3399-io-voltage-domainokay    )mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf  +okay[usb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay[+host-port +Q linestateokay[,otg-port +0Qghjotg-bvalidotg-idlinestateokay[1usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480m disabled[.host-port +Q linestateokay[/otg-port +0Qlmootg-bvalidotg-idlinestateokay[3phy@f780rockchip,rk3399-emmc-phy$emmcclk 62 +okay[*pcie-phyrockchip,rk3399-pcie-phyrefclk +29phyokay[phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-refS~c 2L9uphyuphy-pipeuphy-tcphy"!okaye0dp-port +[5usb3-port +[2phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refSc 2M9uphyuphy-pipeuphy-tcphy"! disableddp-port +usb3-port +[4watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|Qxrktimer@ff850000rockchip,rk3399-timerQQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifQBatx mclkhclkU okay[i2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s"!Q'aatxrxi2s_clki2s_hclkVNbclk_onbclk_off\ okay[i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2sQ(aatxrxi2s_clki2s_hclkWNdefault\  disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2sQ)aatxrxi2s_clki2s_hclkX  disabled[vop@ff8f0000rockchip,rk3399-vop-lit QwScׄaclk_vopdclk_vophclk_vop  2 9axiahbdclkokayport+[endpoint@0#[endpoint@1#[endpoint@2#[endpoint@3#[endpoint@4#[7iommu@ff8f3f00rockchip,iommu?Qw aclkiface  okay[vop@ff900000rockchip,rk3399-vop-big QvScׄaclk_vopdclk_vophclk_vop  2 9axiahbdclkokayport+[endpoint@0#[endpoint@1#[endpoint@2#[endpoint@3#[endpoint@4#[6iommu@ff903f00rockchip,iommu?Qv aclkiface  okay[isp0@ff910000rockchip,rk3399-cif-isp@Q+nispaclkhclk !dphy okayports+port@0+endpoint@0#[Gendpoint@1#[Iiommu@ff914000rockchip,iommu @PQ+ aclkiface   Jokay[isp1@ff920000rockchip,rk3399-cif-isp@Q,oispaclkhclk !dphy  disabledports+port@0+iommu@ff924000rockchip,iommu @PQ, aclkiface   J[hdmi-soundsimple-audio-card ei2s ~ hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmiQ(tqpoiahbisfrcecgrfref "! disabled[ports+port@0+endpoint@0#[endpoint@1#[port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsiQ- porefpclkphy_cfggrf 29apb"!+okay ports+port@0+endpoint@0#[endpoint@1#[port@1endpoint#[panel@0  Ndefault\innolux,p097pfg ports+port@0endpoint#[port@1endpoint@1#[dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsiQ. qorefpclkphy_cfggrf 29apb"!+ +okay[ports+port@0+endpoint@0#[endpoint@1#[port@1endpoint#[dp@ff970000rockchip,rk3399-edpQ jlo dppclkgrfNdefault\ 29dp"! disabledports+port@0+endpoint@0#[endpoint@1#[port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600Q jobmmugpu P #okay< [kpinctrlrockchip,rk3399-pinctrl"!++Ndefault \gpio@ff720000rockchip,gpio-bankrQ   CLK_32K_APEC_IN_RW_ODSPK_PA_ENWLAN_PERST_1V8_LWLAN_PD_1V8_LWLAN_RF_KILL_1V8_LBIGCPU_DVS_PWMSD_CD_L_JTAG_ENBT_EN_BT_RF_KILL_1V8_LPMUIO2_33_18_L_PP3300_S0_ENTOUCH_RESET_LAP_EC_WARM_RESET_REQPEN_RESET_LAP_FLASH_WP_L[gpio@ff730000rockchip,gpio-banksQ   PEN_INT_ODLPEN_EJECT_ODLBT_HOST_WAKE_1V8_LWLAN_HOST_WAKE_1V8_LTOUCH_INT_ODLAP_EC_S3_S0_LAP_EC_OVERTEMPAP_SPI_FLASH_MISOAP_SPI_FLASH_MOSI_RAP_SPI_FLASH_CLK_RAP_SPI_FLASH_CS_L_RSD_CARD_DET_ODLAP_EXPANSION_IO1AP_EXPANSION_IO2AP_I2C_DISP_SDAAP_I2C_DISP_SCLH1_INT_ODLEC_AP_INT_ODLLITCPU_DVS_PWMAP_I2C_AUDIO_SDAAP_I2C_AUDIO_SCLAP_EXPANSION_IO3HEADSET_INT_ODLAP_EXPANSION_IO4['gpio@ff780000rockchip,gpio-bankxPQ   AP_I2C_PEN_SDAAP_I2C_PEN_SCLSD_IO_PWR_ENUCAM_RST_LPP1250_CAM_ENWCAM_RST_LAP_EXPANSION_IO5AP_I2C_CAM_SDAAP_I2C_CAM_SCLAP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LUART_EXPANSION_TX_AP_RXUART_AP_TX_EXPANSION_RXUART_EXPANSION_RTS_AP_CTSUART_AP_RTS_EXPANSION_CTSAP_SPI_EC_MISOAP_SPI_EC_MOSIAP_SPI_EC_CLKAP_SPI_EC_CS_LPP2800_CAM_ENCLK_24M_CAMWLAN_PCIE_CLKREQ_1V8_LSD_PWR_3000_1800_L[Fgpio@ff788000rockchip,gpio-bankxQQ   I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDI_0STRAP_LCDBIAS_LSTRAP_FEATURE_1STRAP_FEATURE_2I2S0_SDO_0gpio@ff790000rockchip,gpio-bankyRQ   I2S_MCLKAP_I2C_EXPANSION_SDAAP_I2C_EXPANSION_SCLDMIC_ENAP_I2C_TS_SDAAP_I2C_TS_SCLGPU_DVS_PWMUART_DBG_TX_AP_RXUART_AP_TX_DBG_RXBL_ENBL_PWMDISPLAY_RST_LPPVARP_LCD_ENPPVARN_LCD_ENSD_SLOT_PWR_EN[pcfg-pull-up ![pcfg-pull-down .[pcfg-pull-none =[pcfg-pull-none-12ma = J [pcfg-pull-none-13ma = J [pcfg-pull-none-18ma = Jpcfg-pull-none-20ma = Jpcfg-pull-up-2ma ! Jpcfg-pull-up-8ma ! Jpcfg-pull-up-18ma ! Jpcfg-pull-up-20ma ! Jpcfg-pull-down-4ma . Jpcfg-pull-down-8ma . Jpcfg-pull-down-12ma . J pcfg-pull-down-18ma . Jpcfg-pull-down-20ma . Jpcfg-output-high Y[pcfg-output-low epcfg-input-enable ppcfg-input-pull-up p !pcfg-input-pull-down p .clockclk-32k }[cifcif-clkin } cif-clkouta } edpedp-hpd }[gmacrgmii-pins }    rmii-pins }     i2c0i2c0-xfer }[i2c1i2c1-xfer }[8i2c2i2c2-xfer }[9i2c3i2c3-xfer }[<i2c4i2c4-xfer }  [i2c5i2c5-xfer }  [?i2c6i2c6-xfer }  [@i2c7i2c7-xfer }[Ai2c8i2c8-xfer }[i2s0i2s0-2ch-bus` }i2s0-2ch-bus-bclk-off` }i2s0-8ch-bus` }[i2s0-8ch-bus-bclk-off` }[i2s1i2s1-2ch-busP }[i2s1-2ch-bus-bclk-offP }sdio0sdio0-bus1 }sdio0-bus4@ }sdio0-cmd }sdio0-clk }sdio0-cd }sdio0-pwr }sdio0-bkpwr }sdio0-wp }sdio0-int }sdmmcsdmmc-bus1 }sdmmc-bus4@ }   [&sdmmc-clk } ["sdmmc-cmd } [#sdmmc-cd }[$sdmmc-wp }sdmmc-cd-pin } [%suspendap-pwroff }[ddrio-pwroff }spdifspdif-bus }spdif-bus-1 }spi0spi0-clk }[Ospi0-cs0 }[Rspi0-cs1 }spi0-tx }[Pspi0-rx }[Qspi1spi1-clk } [Sspi1-cs0 } [Vspi1-rx }[Uspi1-tx }[Tspi1-sleep@ }  [Wspi2spi2-clk } [Xspi2-cs0 } [[spi2-rx } [Zspi2-tx } [Yspi3spi3-clk }[spi3-cs0 }[spi3-rx }[spi3-tx }[spi4spi4-clk }[]spi4-cs0 }[`spi4-rx }[_spi4-tx }[^spi5spi5-clk }[bspi5-cs0 }[espi5-rx }[dspi5-tx }[ctestclktest-clkout0 }test-clkout1 }[Btest-clkout2 }tsadcotp-pin }[lotp-out }[muart0uart0-xfer }[Juart0-cts }uart0-rts }uart1uart1-xfer }  [Kuart2auart2a-xfer } uart2buart2b-xfer }uart2cuart2c-xfer }[Luart3uart3-xfer }[Muart3-cts }uart3-rts }uart4uart4-xfer }[uarthdcpuarthdcp-xfer }pwm0pwm0-pin }[pwm0-pin-pull-down }vop0-pwm-pin }vop1-pwm-pin }pwm1pwm1-pin }[pwm1-pin-pull-down }pwm2pwm2-pin }[pwm2-pin-pull-down }pwm3apwm3a-pin }[pwm3bpwm3b-pin }hdmihdmi-i2c-xfer }hdmi-cec }pciepci-clkreqn-cpm }[pci-clkreqnb-cpm }[pcfg-pull-none-8ma = J[backlight-enablebl-en }[cros-ecec-ap-int-l }[fdiscrete-regulatorssd-io-pwr-en }[sd-pwr-1800-sel }[sd-slot-pwr-en }[display-rst-l }[ppvarp-lcd-en }[ppvarn-lcd-en }[codecheadset-int-l }[mic-int } max98357asdmode-en }[touchscreentouch-int-l }[=touch-reset-l } [>trackpadap-i2c-tp-pu-en } trackpad-int-l }wifiwlan-module-reset-l } bt-host-wake-l }[-bt-en-1v8-l }[wlan-pd-1v8-l }[wlan-rf-kill-1v8-l }[wifi-perst-l }[wlan-host-wake-l }write-protectap-fw-wp } pcfg-pull-none-6ma = J[camerapp1250-dvdd }[pp2800-avdd }[ucam_rst }[Hwcam_rst }[Cdigitizerpen-int-odl }[:pen-reset-l } [;dmicdmic-en }[penpen-eject-odl }[tpmh1-int-od-l }[\opp-table-0operating-points-v2 [ opp00 Q 5 @opp01 #F opp02 0, Popp03 < opp04 G opp05 Tfr  opp06 ZJ 0opp-table-1operating-points-v2 [ opp00 Q 5 @opp01 #F 5opp02 0, opp03 < Popp04 G opp05 Tfr opp06 _"  opp07 kI 0opp08 x) opp-table-2operating-points-v2[opp00  5opp01 @ 5opp02 ׄ opp03 e Popp04 #F Hopp05 / g8opp-table-3operating-points-v2[opp00 ׄ opp01 'Z opp02 / opp03 7P(  chosen serial2:115200n8ppvar-sysregulator-fixed ppvar_sys  [pp1200-lpddrregulator-fixed pp1200_lpddr   O !O 9pp1800regulator-fixed pp1800   w@ !w@ 9[pp3300regulator-fixed pp3300   2Z !2Z 9[pp5000regulator-fixed pp5000   LK@ !LK@ 9ppvar-bigcpu-pwmpwm-regulator ppvar_bigcpu_pwm D  I Td hd   5J ![ppvar-bigcpuvctrl-regulator ppvar_bigcpu 5J ! { 5J B[ppvar-litcpu-pwmpwm-regulator ppvar_litcpu_pwm D  I Td hd   =J !N[ppvar-litcpuvctrl-regulator ppvar_litcpu =J !N { =JN [ ppvar-gpu-pwmpwm-regulator ppvar_gpu_pwm D  I Td hd   3p !P[ppvar-gpuvctrl-regulator ppvar_gpu 3p !P { 3pP [pp900-appp3000-sd-slotregulator-fixed pp3000_sd_slotNdefault\   9[(ppvar-sd-card-ioregulator-gpio ppvar_sd_card_ioNdefault\  F HF5w@2Z w@ !2Z[)pp3300-trackpadap-rtc-clk fixed-clocksxin32kmax98357amaxim,max98357aNdefault\  okay[soundrockchip,rk3399-gru-sound  pp1250-s3regulator-fixed pp1250_s3    ! 9[pp1250-dvddregulator-fixed pp1250_dvddNdefault\  F 9[Epp900-s0regulator-fixed pp900_s0    !  9[ppvarn-lcdregulator-fixed ppvarn_lcdNdefault\   9[ppvarp-lcdregulator-fixed ppvarp_lcdNdefault\   9[pp900-s3regulator-fixed pp900_s3    !  9pp2800-avddregulator-fixed pp2800_avddNdefault\  Fd 9[Dbt-3v3regulator-fixed bt_3v3Ndefault\   9[wlan-3v3regulator-fixed wlan_3v3Ndefault\  ' 9[backlightpwm-backlight Ndefault\ DB@[dmic dmic-codec 3Ndefault\@[gpio-keys gpio-keysNdefault\switch-pen-insert PPen Insert H'Var compatibleinterrupt-parent#address-cells#size-cellschassis-typemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusrockchip,pd-idle-nsrockchip,sr-idle-nsrockchip,sr-mc-gate-idle-nsrockchip,srpd-lite-idle-nsrockchip,standby-idle-nsrockchip,ddr3_odt_dis_freqrockchip,lpddr3_odt_dis_freqrockchip,lpddr4_odt_dis_freqrockchip,sr-mc-gate-idle-dis-freq-hzrockchip,srpd-lite-idle-dis-freq-hzrockchip,standby-idle-dis-freq-hzcenter-supplyinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiospinctrl-namespinctrl-0vpcie3v3-supplyvpcie1v8-supplyvpcie0v9-supplypcie-reset-suspendinterrupt-controllerqcom,ath10k-calibration-variantmax-functionsnum-lanesrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthassigned-clocksassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removableextcondr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nshid-descr-addrreset-gpiosavdd-supplydvdd-supplydovdd-supplydata-lanesreg-shiftreg-io-widthdmasdma-namespinctrl-1spi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-idkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymappolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplydlg,micbias-lvldlg,mic-amp-in-selVDD-supplyVDDMIC-supplyVDDIO-supplydlg,adc-1bit-rptdlg,btn-avgdlg,btn-cfgdlg,mic-det-thrdlg,jack-ins-debdlg,jack-det-ratedlg,jack-rem-debdlg,a-d-btn-thrdlg,d-b-btn-thrdlg,b-c-btn-thrdlg,c-mic-btn-thr#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightenable-gpiosavee-supplymali-supplygpio-controller#gpio-cellsgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitctrl-supplyctrl-voltage-rangeregulator-settling-time-up-usenable-active-highgpiosdmode-gpiossdmode-delayrockchip,cpurockchip,codecstartup-delay-usregulator-enable-ramp-delaydmicen-gpioswakeup-delay-mslabellinux,codelinux,input-typewakeup-source