k8e4(qd#geekbuying,geekboxrockchip,rk3368 +7GeekBoxaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/ethernet@ff290000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53psciarm-pmuarm,armv8-pmuv3`pqrstuvw  psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockn6 xin24m3Ammc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @@р N  D r vUbiuciuciu-driveciu-samplea l sreset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @@р N  E s wUbiuciuciu-driveciu-samplea !l sreset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@@р N  G u yUbiuciuciu-driveciu-samplea #l sresetokayр  default  saradc@ff100000rockchip,saradc $N I [Usaradcapb_pclkl W ssaradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spiN A RUspiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spiN B SUspiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spiN C TUspiclkapb_pclk )default+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+Ui2cN Ndefault disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+Ui2cN Odefault disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+Ui2cN Pdefault disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+Ui2cN Qdefault disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartn6N M UUbaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartn6N N VUbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartn6N P XUbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartn6N Q YUbaudclkapb_pclk ; disableddma-controller@ff250000arm,pl330arm,primecell%@ 0N  Uapb_pclkthermal-zonescpu-thermalGd]k tripscpu_alert0{$passive!cpu_alert1{8passive"cpu_crit{s criticalcooling-mapsmap0!0map1"0 gpu-thermalGd]k tripsgpu_alert0{8passive#gpu_crit{8 criticalcooling-mapsmap0#0tsadc@ff280000rockchip,rk3368-tsadc( %N H ZUtsadcapb_pclkl  stsadc-apbinitdefaultsleep$%$sokay ethernet@ff290000rockchip,rk3368-gmac) macirq)&8N  f g c ]MUstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokay6'ArgmiiJinputW g(default)~0usb@ff500000 generic-ehciP N okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X N Uotgotg@@ okaydma-controller@ff600000arm,pl330arm,primecell`@ 0N  Uapb_pclkBi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ceN LUi2c <default*+okaypmic@1brockchip,rk808default+, -... ..%.1 =.I.V.c  xin32krk808-clkout23regulatorsDCDC_REG1p ``vdd_cpuDCDC_REG2p ``vdd_logDCDC_REG3pvcc_ddrDCDC_REG4p2Z2Zvcc_io LDO_REG1pw@w@ vcc18_flash LDO_REG2p2Z2Z vcc33_lcdLDO_REG3pB@B@vdd_10LDO_REG4w@w@vcca_18LDO_REG5pw@2Z vccio_sdLDO_REG6pB@B@ vdd10_lcdLDO_REG7pw@w@vcc_18LDO_REG8pw@w@ vcc18_lcdSWITCH_REG1vcc_sdSWITCH_REG2pvcc_lan'i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+Ui2cN Mdefault/ disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault0N _ disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault1N _ disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh N _ disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default2N _ disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uartiN O WUbaudclkapb_pclk 9default3okaymbox@ff6b0000rockchip,rk3368-mailboxk0N E Upclk_mailbox disabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controller+Epower-domain@12 N       c h g n o r s f d d h i l k j n m$456789:;<power-domain@14 N  o p =>?power-domain@16N @@syscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsFio-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeRBRB(RB 8RBclock-controller@ff760000rockchip,rk3368-cruvNAUxin24m)&3D syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw&io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdtN p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  BN a U Upclktimerspdif@ff880000rockchip,rk3368-spdif 6N S  UmclkhclkQBVtxdefaultC disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (Ui2s_clki2s_hclkN T QBBVtxrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5Ui2s_clki2s_hclkN R QBBVtxrxdefaultD disablediommu@ff900800rockchip,iommu N  Uaclkiface`E n disablediommu@ff914000rockchip,iommu @P N  Uaclkifacen`E { disablediommu@ff930300rockchip,iommu N  Uaclkiface`E n disablediommu@ff9a0440rockchip,iommu @@@ N  Uaclkifacen disablediommu@ff9a0800rockchip,iommu  N  Uaclkifacen disabledqos@ffad0000rockchip,rk3368-qossyscon 4qos@ffad0080rockchip,rk3368-qossyscon 5qos@ffad0100rockchip,rk3368-qossyscon 6qos@ffad0180rockchip,rk3368-qossyscon 7qos@ffad0200rockchip,rk3368-qossyscon 8qos@ffad0280rockchip,rk3368-qossyscon 9qos@ffad0300rockchip,rk3368-qossyscon :qos@ffad0380rockchip,rk3368-qossyscon ;qos@ffad0400rockchip,rk3368-qossyscon <qos@ffae0000rockchip,rk3368-qossyscon =qos@ffae0100rockchip,rk3368-qossyscon >qos@ffae0180rockchip,rk3368-qossyscon ?qos@ffaf0000rockchip,rk3368-qossyscon @efuse@ffb00000rockchip,rk3368-efuse +N q Upclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400@ @ `   pinctrlrockchip,rk3368-pinctrl)&F+gpio@ff750000rockchip,gpio-bankuN @ Q-gpio@ff780000rockchip,gpio-bankxN A Rgpio@ff790000rockchip,gpio-bankyN B SMgpio@ff7a0000rockchip,gpio-bankzN C TJpcfg-pull-upHpcfg-pull-downpcfg-pull-noneGpcfg-pull-none-12ma Iemmcemmc-clk$G emmc-cmd$Hemmc-pwr$Hemmc-bus1$Hemmc-bus4@$HHHHemmc-bus8$HHHHHHHHgmacrgmii-pins$GGGI I III IGGGGGG)rmii-pins$GGGI I IGGGGi2c0i2c0-xfer $GG*i2c1i2c1-xfer $GG/i2c2i2c2-xfer $ GGi2c3i2c3-xfer $GGi2c4i2c4-xfer $GGi2c5i2c5-xfer $GGi2si2s-8ch-bus$ G GGGGGGGGDpwm0pwm0-pin$G0pwm1pwm1-pin$G1pwm3pwm3-pin$G2sdio0sdio0-bus1$Hsdio0-bus4@$HHHHsdio0-cmd$Hsdio0-clk$Gsdio0-cd$Hsdio0-wp$Hsdio0-pwr$Hsdio0-bkpwr$Hsdio0-int$Hsdmmcsdmmc-clk$ Gsdmmc-cmd$ Hsdmmc-cd$ Hsdmmc-bus1$Hsdmmc-bus4@$HHHHspdifspdif-tx$GCspi0spi0-clk$Hspi0-cs0$Hspi0-cs1$Hspi0-tx$Hspi0-rx$Hspi1spi1-clk$Hspi1-cs0$Hspi1-cs1$Hspi1-rx$Hspi1-tx$Hspi2spi2-clk$ Hspi2-cs0$ Hspi2-rx$ Hspi2-tx$ Htsadcotp-pin$G$otp-out$G%uart0uart0-xfer $HGuart0-cts$Guart0-rts$Guart1uart1-xfer $HGuart1-cts$Guart1-rts$Guart2uart2-xfer $HG3uart3uart3-xfer $HGuart3-cts$Guart3-rts$Guart4uart4-xfer $HGuart4-cts$Guart4-rts$Girir-int$GKkeyspwr-key$GLpmicpmic-sleep$G,pmic-int$H+chosen2serial2:115200n8memory@0memorygmac-clk fixed-clocksY@  ext_gmac3(ir-receivergpio-ir-receiver >JdefaultKgpio-keys gpio-keysdefaultLkey-power >- DGPIO PowerJtUgpio-leds gpio-ledsled-0 >MDgeekbox:blue:ledconled-1 >MDgeekbox:red:ledcoffvcc-sys-regulatorregulator-fixedvcc_sysLK@LK@p. compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeednon-removablevmmc-supplyvqmmc-supplypinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outassigned-clocksassigned-clock-parentstx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-namespower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathgpioslabellinux,codewakeup-sourcedefault-state