#8( 'pine64,rock64rockchip,rk3328 +7Pine64 Rock64aliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci# cpu@1cpuarm,cortex-a53xpsci# cpu@2cpuarm,cortex-a53xpsci# cpu@3cpuarm,cortex-a53xpsci# idle-states+pscicpu-sleeparm,idle-state8I`xq#l2-cache0cache#opp-table-0operating-points-v2#opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2sAnalog3okaysimple-audio-card,cpu:simple-audio-card,codec:arm-pmuarm,cortex-a53-pmu0DdefgO display-subsystemrockchip,display-subsystemb hdmi-soundsimple-audio-cardi2sHDMI3okaysimple-audio-card,cpu:simple-audio-card,codec:psciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0D   xin24m fixed-clockhun6xin24m#Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s D)7i2s_clki2s_hclk  txrx3okay#i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s D*8i2s_clki2s_hclktxrx3okay#i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s D+9i2s_clki2s_hclktxrx 3disabledspdif@ff030000rockchip,rk3328-spdif D.: mclkhclk txdefault3okay#hpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep 3disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd#9io-domains"rockchip,rk3328-io-voltage-domain3okay,:gpiorockchip,rk3328-grf-gpioGW#Dpower-controller!rockchip,rk3328-power-controllerc+#;power-domain@6cpower-domain@5 BABcpower-domain@8Fcreboot-modesyscon-reboot-modew~RBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart D7&baudclkapb_pclktxrxdefault  ! 3disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart D8'baudclkapb_pclktxrxdefault "#$ 3disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart D9(baudclkapb_pclktxrxdefault%3okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c D$+7 i2cpclkdefault& 3disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c D%+8 i2cpclkdefault'3okaypmic@18rockchip,rk805 (Dhxin32krk805-clkout2GWdefault)*****6*#gregulatorsDCDC_REG1 Bvdd_logicQ 4i 0regulator-state-memB@DCDC_REG2Bvdd_armQ 4i 0#regulator-state-mem~DCDC_REG3Bvcc_ddrregulator-state-memDCDC_REG4Bvcc_ioQ2Zi2Z#regulator-state-mem2ZLDO_REG1Bvcc_18Qw@iw@#regulator-state-memw@LDO_REG2 Bvcc18_emmcQw@iw@#regulator-state-memw@LDO_REG3Bvdd_10QB@iB@regulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c D&+9 i2cpclkdefault+ 3disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c D'+: i2cpclkdefault, 3disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi D1+ spiclkapb_pclk txrxdefault-./03okayflash@0jedec,spi-norwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt D(pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault1 3disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault2 3disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault3 3disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault4 3disableddma-controller@ff1f0000arm,pl330arm,primecell@D  apb_pclk$#thermal-zonessoc-thermal/ESe5tripstrip-point0uppassivetrip-point1uLpassive#6soc-critus criticalcooling-mapsmap060 tsadc@ff250000rockchip,rk3328-tsadc% D:$P$tsadcapb_pclkinitdefaultsleep787B tsadc-apb93okay)@#5efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse[ id@7cpu-leakage@17logic-leakage@19cpu-version@1ao#Fadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( DPt%saradcapb_pclkV saradc-apb 3disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TDZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 D` aclkiface 3disablediommu@ff340800rockchip,iommu4@ DbF aclkiface 3disabledvideo-codec@ff350000rockchip,rk3328-vpu5 D vdpuF aclkhclk:;iommu@ff350800rockchip,iommu5@ D F aclkiface;#:video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6 D BABaxiahbcabaccoreAB ׄׄ<;iommu@ff360480rockchip,iommu 6@6@ DJB aclkiface;#<vop@ff370000rockchip,rk3328-vop7> D x;aclk_vopdclk_vophclk_vop axiahbdclk=3okayport+# endpoint@0>#Ciommu@ff373f00rockchip,iommu7? D ; aclkiface3okay#=hdmi@ff3c0000rockchip,rk3328-dw-hdmi<D#GFiahbisfrcec?hdmidefault @AB93okay#ports+port@0endpointC#>port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk93okay D#phy@ff430000rockchip,rk3328-hdmi-phyC DSEysysclkrefoclkrefpclk hdmi_phyhF cpu-version3okay#?clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD9h x=&'(ABDC"\5H4$zEEE|n6n6n6n6#FLGрxhxhрxhxh#syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEphyclk usb480m_phyh{G3okay#Gotg-port$D;<=otg-bvalidotg-idlinestate3okay#Vhost-port D> linestate3okay#Wmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ D  =!JNbiuciuciu-driveciu-sample.р3okay9CUfdefaultHIJKqLmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ D  >"KObiuciuciu-driveciu-sample.р 3disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@ D ?#LPbiuciuciu-driveciu-sample.р3okay9C}default MNOqethernet@ff540000rockchip,rk3328-gmacT Dmacirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth93okaydfPPinputrgmiidefaultQ  R 0'PE$Nethernet@ff550000rockchip,rk3328-gmacU9 Dmacirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmacethrmiiWSoutput 3disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultTUb#Susb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X DMotgthost|@ V usb2-phy3okayusb@ff5c0000 generic-ehci\ D NGWusb3okayusb@ff5d0000 generic-ohci] D NGWusb3okayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` DC`aref_clksuspend_clkbus_clkthost utmi_wide  1 J3okayinterrupt-controller@ff811000 arm,gic-400 c t@ @ `  D #crypto@ff060000rockchip,rk3328-crypto@ DPQ;hclk_masterhclk_slavesclkD crypto-rstpinctrlrockchip,rk3328-pinctrl9+ gpio@ff210000rockchip,gpio-bank! D3GW t c#cgpio@ff220000rockchip,gpio-bank" D4GW t c#Rgpio@ff230000rockchip,gpio-bank# D5GW t c#(gpio@ff240000rockchip,gpio-bank$ D6GW t cpcfg-pull-up #Zpcfg-pull-down #bpcfg-pull-none #Xpcfg-pull-none-2ma  #apcfg-pull-up-2ma  pcfg-pull-up-4ma  #[pcfg-pull-none-4ma  #^pcfg-pull-down-4ma  pcfg-pull-none-8ma  #\pcfg-pull-up-8ma  #]pcfg-pull-none-12ma  #_pcfg-pull-up-12ma  #`pcfg-output-high pcfg-output-low pcfg-input-high  #Ypcfg-input i2c0i2c0-xfer XX#&i2c1i2c1-xfer XX#'i2c2i2c2-xfer  XX#+i2c3i2c3-xfer XX#,i2c3-pins XXhdmi_i2chdmii2c-xfer XX#Apdm-0pdmm0-clk X#pdmm0-fsync Xpdmm0-sdi0 X#pdmm0-sdi1 X#pdmm0-sdi2 X#pdmm0-sdi3 X#pdmm0-clk-sleep Y#pdmm0-sdi0-sleep Y#pdmm0-sdi1-sleep Y#pdmm0-sdi2-sleep Y#pdmm0-sdi3-sleep Y#pdmm0-fsync-sleep Ytsadcotp-pin  X#7otp-out  X#8uart0uart0-xfer  XZ#uart0-cts  X# uart0-rts  X#!uart0-rts-pin  Xuart1uart1-xfer XZ#"uart1-cts X##uart1-rts X#$uart1-rts-pin Xuart2-0uart2m0-xfer XZuart2-1uart2m1-xfer XZ#%spi0-0spi0m0-clk Zspi0m0-cs0  Zspi0m0-tx  Zspi0m0-rx  Zspi0m0-cs1  Zspi0-1spi0m1-clk Zspi0m1-cs0 Zspi0m1-tx Zspi0m1-rx Zspi0m1-cs1 Zspi0-2spi0m2-clk Z#-spi0m2-cs0 Z#0spi0m2-tx Z#.spi0m2-rx Z#/i2s1i2s1-mclk Xi2s1-sclk Xi2s1-lrckrx Xi2s1-lrcktx Xi2s1-sdi Xi2s1-sdo Xi2s1-sdio1 Xi2s1-sdio2 Xi2s1-sdio3 Xi2s1-sleep YYYYYYYYYi2s2-0i2s2m0-mclk Xi2s2m0-sclk Xi2s2m0-lrckrx Xi2s2m0-lrcktx Xi2s2m0-sdi Xi2s2m0-sdo Xi2s2m0-sleep` YYYYYYi2s2-1i2s2m1-mclk Xi2s2m1-sclk Xi2sm1-lrckrx Xi2s2m1-lrcktx Xi2s2m1-sdi Xi2s2m1-sdo Xi2s2m1-sleepP YYYYYspdif-0spdifm0-tx X#spdif-1spdifm1-tx Xspdif-2spdifm2-tx Xsdmmc0-0sdmmc0m0-pwren [sdmmc0m0-pin [sdmmc0-1sdmmc0m1-pwren [sdmmc0m1-pin [#dsdmmc0sdmmc0-clk \#Hsdmmc0-cmd ]#Isdmmc0-dectn [#Jsdmmc0-wrprt [sdmmc0-bus1 ]sdmmc0-bus4@ ]]]]#Ksdmmc0-pins [[[[[[[[sdmmc0extsdmmc0ext-clk ^sdmmc0ext-cmd [sdmmc0ext-wrprt [sdmmc0ext-dectn [sdmmc0ext-bus1 [sdmmc0ext-bus4@ [[[[sdmmc0ext-pins [[[[[[[[sdmmc1sdmmc1-clk  \sdmmc1-cmd  ]sdmmc1-pwren ]sdmmc1-wrprt ]sdmmc1-dectn ]sdmmc1-bus1 ]sdmmc1-bus4@ ]]]]sdmmc1-pins  [ [[[[[[[[emmcemmc-clk _#Memmc-cmd `#Nemmc-pwren Xemmc-rstnout Xemmc-bus1 `emmc-bus4@ ````emmc-bus8 ````````#Opwm0pwm0-pin X#1pwm1pwm1-pin X#2pwm2pwm2-pin X#3pwmirpwmir-pin X#4gmac-1rgmiim1-pins`  \ ^^\^^^ ^ ^\ \^^\\\ \^\\\\#Qrmiim1-pins a_aaaa a a_ _ X XXXXXgmac2phyfephyled-speed10 Xfephyled-duplex Xfephyled-rxm1 X#Tfephyled-txm1 Xfephyled-linkm1 X#Utsadc_pintsadc-int  Xtsadc-pin  Xhdmi_pinhdmi-cec X#@hdmi-hpd b#Bcif-0dvp-d2d9-m0 XXXXX X X XXXXXcif-1dvp-d2d9-m1 XXXXXXXXXXXXirir-int X#fpmicpmic-int-l Z#)usb2usb20-host-drv X#echosen serial2:1500000n8external-gmac-clock fixed-clockusY@ gmac_clkinh#Psdmmc-regulatorregulator-fixed cdefaultdBvcc_sdQ2Zi2Z #Lvcc-host-5v-regulatorregulator-fixed cdefaulte Bvcc_host_5v *vcc-sysregulator-fixedBvcc_sysQLK@iLK@#*ir-receivergpio-ir-receiver (fdefaultleds gpio-ledsled-0 g mmc0led-1 g heartbeatspdif-soundsimple-audio-cardSPDIFsimple-audio-card,cpu:hsimple-audio-card,codec:ispdif-ditlinux,spdif-dit#i compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltspi-max-frequency#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplymmc-hs200-1_8vnon-removablevqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-supplyphy-modesnps,force_thresh_dma_modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlephy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathvin-supplylinux,default-trigger