8\( H$&firefly,roc-rk3328-ccrockchip,rk3328 +7Firefly roc-rk3328-ccaliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci# cpu@1cpuarm,cortex-a53xpsci# cpu@2cpuarm,cortex-a53xpsci# cpu@3cpuarm,cortex-a53xpsci# idle-states+pscicpu-sleeparm,idle-state8I`xq#l2-cache0cache#opp-table-0operating-points-v2#opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2sAnalog3okaysimple-audio-card,cpu:simple-audio-card,codec:arm-pmuarm,cortex-a53-pmu0DdefgO display-subsystemrockchip,display-subsystemb hdmi-soundsimple-audio-cardi2sHDMI3okaysimple-audio-card,cpu:simple-audio-card,codec:psciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0D   xin24m fixed-clockhun6xin24m#Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s D)7i2s_clki2s_hclk  txrx3okay#i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s D*8i2s_clki2s_hclktxrx3okay#i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s D+9i2s_clki2s_hclktxrx 3disabledspdif@ff030000rockchip,rk3328-spdif D.: mclkhclk txdefault 3disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep 3disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd#:io-domains"rockchip,rk3328-io-voltage-domain3okay,:gpiorockchip,rk3328-grf-gpioGW#epower-controller!rockchip,rk3328-power-controllerc+#<power-domain@6cpower-domain@5 BABcpower-domain@8Fcreboot-modesyscon-reboot-modew~RBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart D7&baudclkapb_pclktxrxdefault  !" 3disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart D8'baudclkapb_pclktxrxdefault #$% 3disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart D9(baudclkapb_pclktxrxdefault&3okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c D$+7 i2cpclkdefault' 3disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c D%+8 i2cpclkdefault(3okaypmic@18rockchip,rk805 )Dhxin32krk805-clkout2GWdefault*++++*6#hregulatorsDCDC_REG1 Bvdd_logicQ 4i regulator-state-memB@DCDC_REG2Bvdd_armQ 4i #regulator-state-mem~DCDC_REG3Bvcc_ddrregulator-state-memDCDC_REG4Bvcc_ioQ2Zi2Z#regulator-state-mem2ZLDO_REG1Bvcc_18Qw@iw@#regulator-state-memw@LDO_REG2 Bvcc18_emmcQw@iw@#regulator-state-memw@LDO_REG3Bvdd_10QB@iB@regulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c D&+9 i2cpclkdefault, 3disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c D'+: i2cpclkdefault- 3disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi D1+ spiclkapb_pclk txrxdefault./01 3disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt D(pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault2 3disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault3 3disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault4 3disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault5 3disableddma-controller@ff1f0000arm,pl330arm,primecell@D apb_pclk#thermal-zonessoc-thermal,>6tripstrip-point0NpZpassivetrip-point1NLZpassive#7soc-critNsZ criticalcooling-mapsmap0e70j ytsadc@ff250000rockchip,rk3328-tsadc% D:$P$tsadcapb_pclkinitdefaultsleep898B tsadc-apb:3okay#6efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse id@7cpu-leakage@17logic-leakage@19cpu-version@1a#Fadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( DP%saradcapb_pclkV saradc-apb 3disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TDZW]XY[\"-gpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 D` aclkiface= 3disablediommu@ff340800rockchip,iommu4@ DbF aclkiface= 3disabledvideo-codec@ff350000rockchip,rk3328-vpu5 D -vdpuF aclkhclkJ;Q<iommu@ff350800rockchip,iommu5@ D F aclkiface=Q<#;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6 D BABaxiahbcabaccoreAB ׄׄJ=Q<iommu@ff360480rockchip,iommu 6@6@ DJB aclkiface=Q<#=vop@ff370000rockchip,rk3328-vop7> D x;aclk_vopdclk_vophclk_vop axiahbdclkJ>3okayport+# endpoint@0_?#Diommu@ff373f00rockchip,iommu7? D ; aclkiface=3okay#>hdmi@ff3c0000rockchip,rk3328-dw-hdmi<D#GFiahbisfrceco@thdmidefault ABC:3okay#ports+port@0endpoint_D#?port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk:3okay#phy@ff430000rockchip,rk3328-hdmi-phyC DSEysysclkrefoclkrefpclk hdmi_phyh~F cpu-version3okay#@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD:hx=&'(ABDC"\5H4$zEEE|n6n6n6n6#FLGрxhxhрxhxh#syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEphyclk usb480m_phyh{G3okay#Gotg-port$D;<=-otg-bvalidotg-idlinestate3okay#Vhost-port D> -linestate3okay#Wmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ D  =!JNbiuciuciu-driveciu-sampleр3okaydefaultHIJK(5BPL\mmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ D  >"KObiuciuciu-driveciu-sampleр 3disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@ D ?#LPbiuciuciu-driveciu-sampleр3okayivdefault MNOP\ethernet@ff540000rockchip,rk3328-gmacT D-macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth:3okaydfPPinputQrgmiidefaultR )  'P*$3ethernet@ff550000rockchip,rk3328-gmacU: D-macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmacethrmii<Soutput 3disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultTUG#Susb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X DMotgYhostas@ oV tusb2-phy3okayusb@ff5c0000 generic-ehci\ D NGoWtusb3okayusb@ff5d0000 generic-ohci] D NGoWtusb3okayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` DC`aref_clksuspend_clkbus_clkYhost utmi_wide  /3okayinterrupt-controller@ff811000 arm,gic-400 H Y@ @ `  D #crypto@ff060000rockchip,rk3328-crypto@ DPQ;hclk_masterhclk_slavesclkD crypto-rstpinctrlrockchip,rk3328-pinctrl:+ ngpio@ff210000rockchip,gpio-bank! D3GW Y H#cgpio@ff220000rockchip,gpio-bank" D4GW Y H#)gpio@ff230000rockchip,gpio-bank# D5GW Y Hgpio@ff240000rockchip,gpio-bank$ D6GW Y Hpcfg-pull-up u#Zpcfg-pull-down #bpcfg-pull-none #Xpcfg-pull-none-2ma  #apcfg-pull-up-2ma u pcfg-pull-up-4ma u #[pcfg-pull-none-4ma  #^pcfg-pull-down-4ma  pcfg-pull-none-8ma  #\pcfg-pull-up-8ma u #]pcfg-pull-none-12ma  #_pcfg-pull-up-12ma u #`pcfg-output-high pcfg-output-low pcfg-input-high u #Ypcfg-input i2c0i2c0-xfer XX#'i2c1i2c1-xfer XX#(i2c2i2c2-xfer  XX#,i2c3i2c3-xfer XX#-i2c3-pins XXhdmi_i2chdmii2c-xfer XX#Bpdm-0pdmm0-clk X#pdmm0-fsync Xpdmm0-sdi0 X#pdmm0-sdi1 X#pdmm0-sdi2 X#pdmm0-sdi3 X#pdmm0-clk-sleep Y#pdmm0-sdi0-sleep Y#pdmm0-sdi1-sleep Y#pdmm0-sdi2-sleep Y#pdmm0-sdi3-sleep Y#pdmm0-fsync-sleep Ytsadcotp-pin  X#8otp-out  X#9uart0uart0-xfer  XZ# uart0-cts  X#!uart0-rts  X#"uart0-rts-pin  Xuart1uart1-xfer XZ##uart1-cts X#$uart1-rts X#%uart1-rts-pin Xuart2-0uart2m0-xfer XZuart2-1uart2m1-xfer XZ#&spi0-0spi0m0-clk Zspi0m0-cs0  Zspi0m0-tx  Zspi0m0-rx  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_#Memmc-cmd `#Nemmc-pwren Xemmc-rstnout Xemmc-bus1 `emmc-bus4@ ````emmc-bus8 ````````#Opwm0pwm0-pin X#2pwm1pwm1-pin X#3pwm2pwm2-pin X#4pwmirpwmir-pin X#5gmac-1rgmiim1-pins`  \ ^^\^^^ ^ ^\ \^^\\\ \^\\\\#Rrmiim1-pins a_aaaa a a_ _ X XXXXXgmac2phyfephyled-speed10 Xfephyled-duplex Xfephyled-rxm1 X#Tfephyled-txm1 Xfephyled-linkm1 X#Utsadc_pintsadc-int  Xtsadc-pin  Xhdmi_pinhdmi-cec X#Ahdmi-hpd b#Ccif-0dvp-d2d9-m0 XXXXX X X XXXXXcif-1dvp-d2d9-m1 XXXXXXXXXXXXpmicpmic-int-l Z#*usb2usb20-host-drv X#fchosen serial2:1500000n8external-gmac-clock fixed-clockusY@ gmac_clkinh#Pdc-12vregulator-fixedBdc_12vQi#gsdmmc-regulatorregulator-fixed cdefaultdBvcc_sdQ2Zi2Z #Lsdmmcio-regulatorregulator-gpio ew@2Z Bvcc_sdio voltageQw@i2Z +#vcc-host1-5v-regulatorregulator-fixed  )defaultf Bvcc_host1_5v +vcc-sysregulator-fixedBvcc_sysQLK@iLK@ g#+vcc-phy-regulatorregulator-fixedBvcc_phy#Qleds gpio-ledsled-0 firefly:blue:power $heartbeat h :onled-1 firefly:yellow:user $mmc1 h :off compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vnon-removabletx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-supplyphy-modesnps,aalsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ussnps,rxpbltx_delayrx_delayphy-handlephy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathvin-supplygpiosregulator-typeenable-active-highlabellinux,default-triggerdefault-state