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▄ҐІтLєПюldo_vsim2evsim2tП═▄/M`ldo_vsram_others_sshubevsram_others_sshubt║ ▄ҐІmt6359rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt6873-spmi Иp░ Рpmifspmimst√8(цpmif_sys_ckpmif_tmr_ckspmimst_clk_muxОЪ┐+pmic@6mediatek,mt6315-regulatorИregulatorsvbuck15vbuck1eVbcput─▄7єИюvbuck35vbuck3eVlcput─▄7єИюpmic@7mediatek,mt6315-regulatorИregulatorsvbuck15vbuck1eVgput─▄5єИ'еmailbox@10228000mediatek,mt8192-gceИ"─@/кJ√цgceеaclock-controller@10720000mediatek,mt8192-scp_adspИr┴Vfailserial@11002000*mediatek,mt8192-uartmediatek,mt6577-uartИ /m√ цbaudbusVokayserial@11003000*mediatek,mt8192-uartmediatek,mt6577-uartИ0√ цbaudbusVokay]defaultsleepk'u( n^bluetoothrealtek,rtl8822cs-bt]defaultk)░▄╗·clock-controller@11007000mediatek,mt8192-imp_iic_wrap_cИp┴spi@1100a000(mediatek,mt8192-spimediatek,mt6765-spi+И═/÷√Mцparent-clksel-clkspi-clk Vdisabledthermal-sensor@1100b000mediatek,mt8192-lvts-apИ╟/╘√ ў╣*аlvts-calib-data-1реsvs@1100bc00mediatek,mt8192-svsИ╪/ї√ цmain╣+*(аsvs-calibration-datat-calibration-dataўХsvs_rstpwm@1100e000mediatek,mt8183-disp-pwmИЮ/╚Т√!8цmainmmVokay]defaultk,е─spi@11010000(mediatek,mt8192-spimediatek,mt6765-spi+И/═√M<цparent-clksel-clkspi-clkVokayЪ]defaultk-ec@0google,cros-ec-spiИ-фю]defaultk.+pwmgoogle,cros-ec-pwmТ Vdisabledi2c-tunnelgoogle,cros-ec-i2c-tunnel%+sbs-battery@bsbs,sbs-batteryИ7Kregulator@0google,cros-ec-regulatorИtw@▄2Z═е_regulator@1google,cros-ec-regulatorИt2Z═▄2Z═е^typecgoogle,cros-ec-typec+connector@0usb-c-connectorИ`leftfdualqhost{sourceconnector@1usb-c-connectorИ`rightfdualqhost{sourcekeyboard-controllergoogle,cros-ec-keyb┼ ґDг·÷ґtxЮА q rs}0Y1 d"#(\V |}) ▌+^a !%$' & +,./-32*5 49 8lj6 gi(т spi@11012000(mediatek,mt8192-spimediatek,mt6765-spi+И /║√M>цparent-clksel-clkspi-clk Vdisabledspi@11013000(mediatek,mt8192-spimediatek,mt6765-spi+И0/╒√M?цparent-clksel-clkspi-clk Vdisabledspi@11018000(mediatek,mt8192-spimediatek,mt6765-spi+И─/ё√MLцparent-clksel-clkspi-clk Vdisabledspi@11019000(mediatek,mt8192-spimediatek,mt6765-spi+И░/є√MMцparent-clksel-clkspi-clkVokayИ%Ъ]defaultk/tpm@0google,cr50И╚B@]defaultk0spi@1101d000(mediatek,mt8192-spimediatek,mt6765-spi+Ип/╔√Mmцparent-clksel-clkspi-clk Vdisabledspi@1101e000(mediatek,mt8192-spimediatek,mt6765-spi+ИЮ/і√Mnцparent-clksel-clkspi-clk Vdisabledscp@10500000mediatek,mt8192-scp0ИPrp─Рsramcfgl1tcm/Ё√цmainVokayРmediatek/mt8192/scp.img1]defaultk2еucros-ec-rpmsggoogle,cros-ec-rpmsgcros-ec-rpmsgusb@11200000'mediatek,mt8192-xhcimediatek,mtk-xhci И > Рmacippca"host234О"#Ъ]] √75R$цsys_ckref_ckmcu_ckdma_ckxhci_ck7E6 fVokay\7j8syscon@11210000mediatek,mt8192-audsyssysconИ! ┴е;mt8192-afe-pcmmediatek,mt8192-audio/йў9 Хaudiosysv5о┼°:╪√;;;;;;;;;;; ; ;;;;;;;;/:H/e0i+g,k;<=>?@ABCD▌▐░▒▓⌠■∙√≈≤7uцaud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adda6_adc_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_tdm_clkaud_tml_clkaud_nleaud_dac_hires_clkaud_adc_hires_clkaud_adc_hires_tmlaud_adda6_adc_hires_clkaud_3rd_dac_clkaud_3rd_dac_predis_clkaud_3rd_dac_tmlaud_3rd_dac_hires_clkaud_infra_clkaud_infra_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d4_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d4top_mux_aud_eng2top_apll2_d4top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_i2s6_m_seltop_i2s7_m_seltop_i2s8_m_seltop_i2s9_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_apll12_div5top_apll12_div6top_apll12_div7top_apll12_div8top_apll12_div9top_mux_audio_htop_clk26m_clkе▀pcie@11230000mediatek,mt8192-pcieщpciИ# Рpcie-mac+0√+'*j^\/цpl_250mtl_26mtl_96mtl_32kperi_26mtop_133mО)ЪQ/Ш╙Ъ8^┌─│───Є`г<<<<]defaultk=interrupt-controllerїе<pcie@0,0щpciИу╙+^wifi@0,0(И>spi@11234000mediatek,mt8192-norИ#@Ю/╞√:w]цspisfaxiО:Ъb+Vokay]defaultk?flash@0 winbond,w25q64jwmjedec,spi-norИuъПthermal-sensor@11278000mediatek,mt8192-lvts-mcuИ'─/╙√ ў╣*аlvts-calib-data-1реvefuse@11c10000%mediatek,mt8192-efusemediatek,efuseИа+data1@1c0ИюXе*calib@580И─hе+i2c@11cb0000mediatek,mt8192-i2c Ик!s─/s√@x цmaindma²+Vokayм─]defaultkAanx7625@58analogix,anx7625ИX]defaultkB)* CD'Eports+port@0Иendpoint4Fеeport@1Иendpoint4GеIaux-buspanel edp-panelDEQHportendpoint4IеGclock-controller@11cb1000mediatek,mt8192-imp_iic_wrap_eИк┴е@i2c@11d00000mediatek,mt8192-i2c Ип!v─/w√Jx цmaindma²+Vokayм─]defaultkKi2c@11d01000mediatek,mt8192-i2c Ип!w──/x√Jx цmaindma²+ Vdisabledi2c@11d02000mediatek,mt8192-i2c Ип !y─/y√Jx цmaindma²+ Vdisabledclock-controller@11d03000mediatek,mt8192-imp_iic_wrap_sИп0┴еJi2c@11d20000mediatek,mt8192-i2c Ир!q─/q√Lx цmaindma²+Vokayм─]defaultkMaudio-codec@1aИ[j{N┤N■Nё7realtek,rt5682i╠фOеїi2c@11d21000mediatek,mt8192-i2c Ир!q──/r√Lx цmaindma²+Vokayм─р18]defaultkPtrackpad@15elan,ekth3000И]defaultkQЦR7i2c@11d22000mediatek,mt8192-i2c Ир !s──/t√Lx цmaindma²+ Vdisabledclock-controller@11d23000 mediatek,mt8192-imp_iic_wrap_wsИр0┴еLi2c@11e00000mediatek,mt8192-i2c ИЮ!u─/u√Sx цmaindma²+ Vdisabledclock-controller@11e01000mediatek,mt8192-imp_iic_wrap_wИЮ┴еSt-phy@11e40000.mediatek,mt8192-tphymediatek,generic-tphy-v2+^Дusb-phy@0И√цrefНе3usb-phy@700И √цrefНе4dsi-phy@11e50000mediatek,mt8183-mipi-txИЕ√5 ┴Н ╡mipi_tx0_pllVokayеdi2c@11f00000mediatek,mt8192-i2c ИП!p──/p√Tx цmaindma²+Vokayм─]defaultkUtouchscreen@10И]defaultkV hid-over-i2cЫ Ri2c@11f01000mediatek,mt8192-i2c ИП!u──/v√Tx цmaindma²+ Vdisabledclock-controller@11f02000mediatek,mt8192-imp_iic_wrap_nИП ┴еTclock-controller@11f10000mediatek,mt8192-msdc_topИЯ┴еWmmc@11f60000(mediatek,mt8192-mmcmediatek,mt8183-mmc ИЖУ/c8√W WWWWW3цsourcehclksource_cgsys_cgpclk_cgaxi_cgahb_cgVokay]defaultstate_uhskXuYФКб *Z 6[ C U d s ─ ▒ ╚( ╨ б хmmc@11f70000(mediatek,mt8192-mmcmediatek,mt8183-mmc ИВг/g8√W WWWWW3цsourcehclksource_cgsys_cgpclk_cgaxi_cgahb_cgVokay]defaultstate_uhsk\u]ФКб ж *^ 6_ ъ П Щ ╨ gpu@13000000)mediatek,mt8192-maliarm,mali-valhall-jmИ@0/mlk"jobmmugpu√5(°::::: core0core1core2core3core4 %`Vokay 9clock-controller@13fbf000mediatek,mt8192-mfgcfgИШП┴syscon@14000000mediatek,mt8192-mmsyssysconИ┴Е Eaa Laеmutex@14001000mediatek,mt8192-disp-mutexИ/Э√ La d╡Ё°: smi@14002000mediatek,mt8192-smi-commonИ √цapbsmigals0gals1°: еblarb@14003000mediatek,mt8192-smi-larbИ0 x ┴b√цapbsmi°: еflarb@14004000mediatek,mt8192-smi-larbИ@ x ┴b√цapbsmi°: еgovl@14005000mediatek,mt8192-disp-ovlИP/Ч√ √cc°: LaPovl@14006000mediatek,mt8192-disp-ovl-2lИ`/Ъ°: √ √c"c La`rdma@140070004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmaИp/√ √c ²°: Lapcolor@140090006mediatek,mt8192-disp-colormediatek,mt8173-disp-colorИ░/°: √ La░ccorr@1400a000mediatek,mt8192-disp-ccorrИ═/°: √ La═aal@1400b0002mediatek,mt8192-disp-aalmediatek,mt8183-disp-aalИ╟/°: √ La╟gamma@1400c0006mediatek,mt8192-disp-gammamediatek,mt8183-disp-gammaИю/°: √ Laюpostmask@1400d000mediatek,mt8192-disp-postmaskИп/°: √ Laпdither@1400e0008mediatek,mt8192-disp-dithermediatek,mt8183-disp-ditherИЮ/°: √ LaЮdsi@14010000mediatek,mt8183-dsiИ/ √ dцenginedigitalhs2d ╣dphy°: ўVokayportendpoint4eеFovl@14014000mediatek,mt8192-disp-ovl-2lИ@/°: √ √c#c! La@rdma@140150004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmaИP/ °: √ √c% ² LaPdpi@14016000mediatek,mt8192-dpiИ`/√!5цpixelenginepll Vdisabledm4u@1401d000mediatek,mt8192-m4uИп< ©fghijklmnopqrst/√цbclk°: неcclock-controller@15020000mediatek,mt8192-imgsysИ┴еlarb@1502e000mediatek,mt8192-smi-larbИЮ x ┴b√цapbsmi°:еlclock-controller@15820000mediatek,mt8192-imgsys2И┌┴еlarb@1582e000mediatek,mt8192-smi-larbИ┌Ю x ┴b√цapbsmi°:еmvideo-codec@16000000mediatek,mt8192-vcodec-decИ шu √c─+^`video-codec@10000mediatek,mtk-vcodec-latИ/╙@ √c═c║c╒cёcєc╔cіcї(√4 Fцselsoc-vdecsoc-latvdectopО4ЪF°:video-codec@25000mediatek,mtk-vcodec-coreИP/╘X √c─c│c┌c┐c└c┘c├c┤c┬c┴c┼(√4!!!Fцselsoc-vdecsoc-latvdectopО4ЪF°:larb@1600d000mediatek,mt8192-smi-larbИп x ┴b√ цapbsmi°:еjclock-controller@1600f000mediatek,mt8192-vdecsys_socИП┴е larb@1602e000mediatek,mt8192-smi-larbИЮ x ┴b√!!цapbsmi°:еiclock-controller@1602f000mediatek,mt8192-vdecsysИП┴е!clock-controller@17000000mediatek,mt8192-vencsysИ┴еlarb@17010000mediatek,mt8192-smi-larbИ x ┴b√цapbsmi°:еkvcodec@17020000mediatek,mt8192-vcodec-encИ X √cЮcАcБcЦcДcЕcФcГcХcМcН/5 шu°:√ цvenc_selО3ЪWclock-controller@1a000000mediatek,mt8192-camsysИ┴е"larb@1a001000mediatek,mt8192-smi-larbИ x ┴b√""цapbsmi°:еnlarb@1a002000mediatek,mt8192-smi-larbИ x ┴b√""цapbsmi°:еolarb@1a00f000mediatek,mt8192-smi-larbИП x ┴b√##цapbsmi°:еplarb@1a010000mediatek,mt8192-smi-larbИ x ┴b√$$цapbsmi°:еqlarb@1a011000mediatek,mt8192-smi-larbИ x ┴b√%%цapbsmi°:еrclock-controller@1a04f000mediatek,mt8192-camsys_rawaИП┴е#clock-controller@1a06f000mediatek,mt8192-camsys_rawbИП┴е$clock-controller@1a08f000mediatek,mt8192-camsys_rawcИП┴е%clock-controller@1b000000mediatek,mt8192-ipesysИ┴еlarb@1b00f000mediatek,mt8192-smi-larbИП x ┴b√цapbsmi°: еtlarb@1b10f000mediatek,mt8192-smi-larbИП x ┴b√цapbsmi°: еsclock-controller@1f000000mediatek,mt8192-mdpsysИ┴еlarb@1f002000mediatek,mt8192-smi-larbИ x ┴b√цapbsmi°: еhthermal-zonescpu0-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveеwtrip-crit├═(п Дcriticalcooling-mapsmap03w08 ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪ ЪЪЪЪЪЪЪЪcpu1-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveеxtrip-crit├═(п Дcriticalcooling-mapsmap03x08 ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪ ЪЪЪЪЪЪЪЪcpu2-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveеytrip-crit├═(п Дcriticalcooling-mapsmap03y08 ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪ ЪЪЪЪЪЪЪЪcpu3-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveеztrip-crit├═(п Дcriticalcooling-mapsmap03z08 ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪ ЪЪЪЪЪЪЪЪcpu4-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveе{trip-crit├═(п Дcriticalcooling-mapsmap03{08ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪcpu5-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveе|trip-crit├═(п Дcriticalcooling-mapsmap03|08ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪcpu6-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveе}trip-crit├═(п Дcriticalcooling-mapsmap03}08ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪcpu7-thermal ХХ ЖЗvtripstrip-alertL(пДpassiveе~trip-crit├═(п Дcriticalcooling-mapsmap03~08ЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪЪvpu0-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalvpu1-thermal ХХ ЖЗ tripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalgpu0-thermal ХХ ЖЗ tripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalgpu1-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalinfra-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalcam-thermal ХХ ЖЗ tripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalmd0-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalmd1-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п Дcriticalmd2-thermal ХХ ЖЗtripstrip-alertL(пДpassivetrip-crit├═(п ДcriticalchosenGserial0:115200n8memory@40000000щmemoryИ@─backlight-lcd0pwm-backlightS─║ D│≤XЪjЪ│@еHdmic-codecdmic-codec ї2regulator-1v0-dpbrdgregulator-fixedepp1000_dpbrdg]defaultk┌tB@▄B@ЇйэА┐regulator-1v0-mipibrdgregulator-fixedepp1000_mipibrdg]defaultk└tB@▄B@Їйэ│А┐еCregulator-1v8-dpbrdgregulator-fixedepp1800_dpbrdg]defaultk┘Їйэ~АNregulator-1v8-gregulator-fixed epp1800_ldo_gюйtw@▄w@А7regulator-1v8-mipibrdgregulator-fixedepp1800_mipibrdg]defaultk├Їйэ─АNеDregulator-3v3-dpbrdgregulator-fixedepp3300_dpbrdg]defaultk┤ЇйэА7regulator-3v3-gregulator-fixed epp3300_gюйt2Z═▄2Z═А│е7regulator-3v3-zregulator-fixed epp3300_ldo_zюйt2Z═▄2Z═А│еOregulator-3v3-mipibrdgregulator-fixedepp3300_mipibrdg]defaultk┬ЇйэА7еEregulator-3v3-uregulator-fixed epp3300_uюйt2Z═▄2Z═А7еRregulator-3v3-wlanregulator-fixedepp3300_wlanюйt2Z═▄2Z═]defaultk┴Їэ▐regulator-5v0-aregulator-fixed epp5000_aюйtLK@▄LK@А│е8regulator-var-sysregulator-fixed eppvar_sysюйе│reserved-memory+^scp@50000000shared-dma-poolИP░Ле1wifi@c0000000restricted-dma-poolИюе>audio-codecrealtek,rt1015p]defaultk┼С⌠jеіsoundЩ▀и]aud_clk_mosi_offaud_clk_mosi_onaud_dat_mosi_offaud_dat_mosi_onaud_dat_miso_offaud_dat_miso_onvow_dat_miso_offvow_dat_miso_onvow_clk_miso_offvow_clk_miso_onaud_nle_mosi_offaud_nle_mosi_onaud_dat_miso2_offaud_dat_miso2_onaud_gpio_i2s3_offaud_gpio_i2s3_onaud_gpio_i2s8_offaud_gpio_i2s8_onaud_gpio_i2s9_offaud_gpio_i2s9_onaud_dat_mosi_ch34_offaud_dat_mosi_ch34_onaud_dat_miso_ch34_offaud_dat_miso_ch34_onaud_gpio_tdm_offaud_gpio_tdm_onk▄u█▌▐#░-▒7▓A⌠K■U∙_√j≈u≤─≥▀ √⌡║°╛²Ї·б÷м═ь║Ц╒НёЫє ╔&mediatek,mt8192_mt6359_rt1015p_rt5682speaker-codecs іheadset-codec ї compatibleinterrupt-parent#address-cells#size-cellsmodelovl0ovl-2l0ovl-2l2rdma0rdma4i2c0i2c1i2c2i2c3i2c7mmc0mmc1serial0#clock-cellsclocksclock-divclock-multclock-output-namesphandleclock-frequencydevice_typeregenable-methodcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domainscapacity-dmips-mhz#cooling-cellscpucache-levelcache-unifiedentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usinterruptsopp-sharedopp-hzopp-microvoltdma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxoutput-lowinput-enablebias-pull-updrive-strengthdrive-strength-microampbias-disablebias-pull-downoutput-high#power-domain-cellsclock-namesmediatek,infracfgdomain-supplyassigned-clocksassigned-clock-parentsinterrupts-extendedmediatek,dmic-modemediatek,mic-type-0mediatek,mic-type-2regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesregulator-coupled-withregulator-coupled-max-spreadregulator-compatible#mbox-cellsstatuspinctrl-namespinctrl-0pinctrl-1enable-gpiosdevice-wake-gpioshost-wake-gpiosresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellsmediatek,pad-selectspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countlabelpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapcs-gpiosfirmware-namememory-regionmediatek,rpmsg-nameinterrupt-namesphyswakeup-sourcemediatek,syscon-wakeupvusb33-supplyvbus-supplymediatek,apmixedsysmediatek,topckgenpower-domainsbus-rangeinterrupt-map-maskinterrupt-mapnum-lanesspi-rx-bus-widthspi-tx-bus-widthreset-gpiosvdd10-supplyvdd18-supplyvdd33-supplyremote-endpointpower-supplybacklightrealtek,jd-src#sound-dai-cellsAVDD-supplyDBVDD-supplyLDO1-IN-supplyMICVDD-supplyrealtek,btndet-delayVBAT-supplyclock-stretch-nsvcc-supply#phy-cellspost-power-on-delay-mshid-descr-addrvdd-supplyvmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqecap-mmc-hw-resetmmc-hs400-enhanced-strobehs400-ds-delayno-sdiono-sdnon-removablecd-gpioscap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104no-mmcpower-domain-namesoperating-points-v2mali-supplymboxesmediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusmediatek,rdma-fifo-sizephy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathpwmsbrightness-levelsnum-interpolated-stepsdefault-brightness-levelnum-channelswakeup-delay-msenable-active-highregulator-boot-ongpiovin-supplyno-mapsdb-gpiosmediatek,platformpinctrl-2pinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9pinctrl-10pinctrl-11pinctrl-12pinctrl-13pinctrl-14pinctrl-15pinctrl-16pinctrl-17pinctrl-18pinctrl-19pinctrl-20pinctrl-21pinctrl-22pinctrl-23pinctrl-24pinctrl-25sound-dai