f8`(`$mediatek,mt8188-evbmediatek,mt8188 +!7MediaTek MT8188 evaluation boardcpus+cpu@0=cpuarm,cortex-a55IMpsci[w5k~@@cpu@100=cpuarm,cortex-a55IMpsci[w5k~@@ cpu@200=cpuarm,cortex-a55IMpsci[w5k~@@ cpu@300=cpuarm,cortex-a55IMpsci[w5k~@@ cpu@400=cpuarm,cortex-a55IMpsci[w5k~@@ cpu@500=cpuarm,cortex-a55IMpsci[w5k~@@ cpu@600=cpuarm,cortex-a78IMpsci[k~@@cpu@700=cpuarm,cortex-a78IMpsci[k~@@cpu-mapcluster0core0core1 core2 core3 core4 core5 core6core7idle-statespscicpu-off-larm,idle-state6G2X_hDcpu-off-barm,idle-state6G-Xhcluster-off-larm,idle-state6G7XhHcluster-off-barm,idle-state6G2Xhl2-cache0cachey@l2-cache1cachey@l3-cachecachey @oscillator-13m fixed-clock[]@clk13moscillator-26m fixed-clock[clk26moscillator-32k fixed-clock[clk32kpmu-a55arm,cortex-a55-pmu pmu-a78arm,cortex-a78-pmu psci arm,psci-1.0Tsmctimerarm,armv8-timer @   []@soc+ simple-businterrupt-controller@c000000 arm,gic-v3  I    ppi-partitionsinterrupt-partition-0 interrupt-partition-1syscon@10000000 mediatek,mt8188-topckgensysconIsyscon@10001000#mediatek,mt8188-infracfg-aosysconIsyscon@10003000mediatek,mt8188-pericfgsysconI0 pinctrl@10005000mediatek,mt8188-pinctrl`IP0 iocfg0iocfg_rmiocfg_ltiocfg_lmiocfg_rteint%1adsp-uart-pinspins-tx-rx=#$i2c0-pins&pins-bus=87Di2c1-pins-pins-bus=:9Di2c2-pins'pins-bus=<;Di2c3-pins(pins-bus=>=Di2c4-pins.pins-bus=@?Di2c5-pins1pins-bus=BADi2c6-pins2pins-bus=DCDmmc0-default-pins#pins-cmd-dat$=Q^Depins-clk=^mfpins-rst=^Demmc0-uhs-pins$pins-cmd-dat$=Q^Depins-clk-ds=^mfpins-rst=^Denor-pins+pins-io-ck =}mpins-io-cs =~Dspi0-pinspins-spi=EFGH|spi1-pinspins-spi=KLMN|spi2-pinspins-spi=OPQR|uart0-pinspins-rx-tx= Dwatchdog@10007000mediatek,mt8188-wdtIpsyscon@1000c000"mediatek,mt8188-apmixedsyssysconI/timer@10017000,mediatek,mt8188-timermediatek,mt6765-timerIp pwrap@100240003mediatek,mt8188-pwrapmediatek,mt8195-pwrapsysconI@ pwrap spiwrappmicmediatek,mt6359 mt6359codecregulatorsbuck_vs1vs1 5!0buck_vgpu11vgpu117D Y0buck_vmodemvmodemD*buck_vpuvpu7D Y0buck_vcorevcore D Y0buck_vs2vs2 5j0buck_vpavpa 7,buck_vproc2vproc27DL Ybuck_vproc1vproc17DL Ybuck_vcore_sshub vcore_sshub7buck_vgpu11_sshub vgpu11_sshub7ldo_vaud18vaud18w@w@ldo_vsim1vsim1/M`ldo_vibrvibrO2Zldo_vrf12vrf12 0ldo_vusbvusb--0ldo_vsram_proc2 vsram_proc2 DL0ldo_vio18vio180ldo_vcamiovcamioldo_vcn18vcn18w@w@ldo_vfe28vfe28**xldo_vcn13vcn13  ldo_vcn33_1_bt vcn33_1_bt*5gldo_vcn33_1_wifi vcn33_1_wifi*5gldo_vaux18vaux18w@w@0ldo_vsram_others vsram_others Dldo_vefusevefuseldo_vxo22vxo22w@!0ldo_vrfckvrfck`ldo_vrfck_1vrfckjldo_vbif28vbif28**ldo_vio28vio28*2Z0ldo_vemcvemc,@ 2Zldo_vemc_1vemc&%2Z!ldo_vcn33_2_bt vcn33_2_bt*5gldo_vcn33_2_wifi vcn33_2_wifi*5gldo_va12va12O 0ldo_va09va09 5Oldo_vrf18vrf18Pldo_vsram_md vsram_md D*ldo_vufsvufs"ldo_vm18vm180ldo_vbbckvbbckOldo_vsram_proc1 vsram_proc1 DL0ldo_vsim2vsim2/M`ldo_vsram_others_sshubvsram_others_sshub mt6359rtcmediatek,mt6358-rtcscp@10500000mediatek,mt8188-scp IPr  sramcfgqokayclock-controller@10b91100mediatek,mt8188-adsp-audio26mIserial@11001100*mediatek,mt8188-uartmediatek,mt6577-uartI  baudbusokaydefaultserial@11001200*mediatek,mt8188-uartmediatek,mt6577-uartI  baudbus disabledserial@11001300*mediatek,mt8188-uartmediatek,mt6577-uartI  baudbus disabledserial@11001400*mediatek,mt8188-uartmediatek,mt6577-uartI  baudbus disabledadc@11002000.mediatek,mt8188-auxadcmediatek,mt8173-auxadcI mainokaysyscon@11003000"mediatek,mt8188-pericfg-aosysconI0spi@1100a000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+Iyparent-clksel-clkspi-clkokaydefaultspi@11010000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+Iy2parent-clksel-clkspi-clkokaydefaultspi@11012000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+I y3parent-clksel-clkspi-clkokaydefaultspi@11013000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+I0y4parent-clksel-clkspi-clk disabledspi@11018000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+Iy8parent-clksel-clkspi-clk disabledspi@11019000)mediatek,mt8188-spi-ipmmediatek,spi-ipm+Iy9parent-clksel-clkspi-clk disabledusb@11200000'mediatek,mt8188-xhcimediatek,mtk-xhci I  >  macippc)*vv  sys_ckref_ckmcu_ck  hokaymmc@11230000(mediatek,mt8188-mmcmediatek,mt8183-mmc I# M!sourcehclksource_cgcrypto_clkokay H (:IXev~!"defaultstate_uhs#$mmc@11240000(mediatek,mt8188-mmcmediatek,mt8183-mmc I$$sourcehclksource_cg disabledi2c@11280000mediatek,mt8188-i2c I("%7 maindma+okaydefault&[i2c@11281000mediatek,mt8188-i2c I("%7 maindma+okaydefault'[i2c@11282000mediatek,mt8188-i2c I( "%7 maindma+okaydefault([clock-controller@11283000mediatek,mt8188-imp-iic-wrap-cI(0%usb@112a0000'mediatek,mt8188-xhcimediatek,mtk-xhci I**>  macippc).-vvsys_ckref_ckmcu_ckokayusb@112b0000'mediatek,mt8188-xhcimediatek,mtk-xhci I++>  macippc*,+vvsys_ckref_ckmcu_ck  `okayspi@1132c000(mediatek,mt8188-normediatek,mt8186-norI2X spisfaxiX9okaydefault++flash@0jedec,spi-norIui2c@11e00000mediatek,mt8188-i2c I",7 maindma+okaydefault-[i2c@11e01000mediatek,mt8188-i2c I",7 maindma+okaydefault.[clock-controller@11e02000mediatek,mt8188-imp-iic-wrap-wI ,t-phy@11e30000.mediatek,mt8188-tphymediatek,generic-tphy-v3+okayusb-phy@0I/ refda_ref*t-phy@11e40000.mediatek,mt8188-tphymediatek,generic-tphy-v3+okayusb-phy@0I/ refda_refusb-phy@700I / refda_ref disabledt-phy@11e80000.mediatek,mt8188-tphymediatek,generic-tphy-v3+okayusb-phy@0I/ refda_ref)i2c@11ec0000mediatek,mt8188-i2c I"07 maindma+okaydefault1[i2c@11ec1000mediatek,mt8188-i2c I"07 maindma+okaydefault2[clock-controller@11ec2000 mediatek,mt8188-imp-iic-wrap-enI 0clock-controller@13fbf000mediatek,mt8188-mfgcfgIclock-controller@14000000mediatek,mt8188-vppsys0Iclock-controller@14e00000mediatek,mt8188-wpesysIclock-controller@14e02000mediatek,mt8188-wpesys-vpp0I clock-controller@14f00000mediatek,mt8188-vppsys1Iclock-controller@15000000mediatek,mt8188-imgsysIclock-controller@15110000 mediatek,mt8188-imgsys1-dip-topIclock-controller@15130000mediatek,mt8188-imgsys1-dip-nrIclock-controller@15220000mediatek,mt8188-imgsys-wpe1I"clock-controller@15330000mediatek,mt8188-ipesysI3clock-controller@15520000mediatek,mt8188-imgsys-wpe2IRclock-controller@15620000mediatek,mt8188-imgsys-wpe3Ibclock-controller@16000000mediatek,mt8188-camsysIclock-controller@1604f000mediatek,mt8188-camsys-rawaIclock-controller@1606f000mediatek,mt8188-camsys-yuvaIclock-controller@1608f000mediatek,mt8188-camsys-rawbIclock-controller@160af000mediatek,mt8188-camsys-yuvbI clock-controller@17200000mediatek,mt8188-ccusysI clock-controller@1800f000mediatek,mt8188-vdecsys-socIclock-controller@1802f000mediatek,mt8188-vdecsysIclock-controller@1a000000mediatek,mt8188-vencsysIaliases/soc/serial@11001100/soc/i2c@11280000/soc/i2c@11e00000/soc/i2c@11281000/soc/i2c@11282000/soc/i2c@11e01000/soc/i2c@11ec0000/soc/i2c@11ec1000/soc/mmc@11230000chosen serial0:115200n8memory@40000000=memoryI@reserved-memory+memory@50000000shared-dma-poolIP compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-output-namesinterruptsranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinityreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-upinput-enabledrive-strengthbias-pull-downbias-disablemediatek,disable-extrst#reset-cellsclocksclock-namesinterrupts-extendedregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesmemory-regionstatuspinctrl-namespinctrl-0#io-channel-cellsphysassigned-clocksassigned-clock-parentsmediatek,syscon-wakeupwakeup-sourcebus-widthhs400-ds-delaymax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqecap-mmc-hw-resetno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplypinctrl-1clock-divspi-max-frequency#phy-cellsserial0i2c0i2c1i2c2i2c3i2c4i2c5i2c6mmc0stdout-pathno-map