8( 0google,katsu-sku38google,katsumediatek,mt8183 +7Google katsu sku38 board=tabletaliasesJ/soc/i2c@11007000O/soc/i2c@11011000T/soc/i2c@11009000Y/soc/i2c@1100f000^/soc/i2c@11008000c/soc/i2c@11016000h/soc/i2c@11005000m/soc/i2c@1101a000r/soc/i2c@1101b000w/soc/i2c@11014000|/soc/i2c@11015000/soc/i2c@11017000/soc/ovl@14008000/soc/ovl@14009000/soc/ovl@1400a000/soc/rdma@1400b000/soc/rdma@1400c000/soc/serial@11002000/soc/mmc@11230000/soc/mmc@11240000opp-table-cluster0operating-points-v2 opp0-793000000/D8@ opp0-9100000006= }opp0-1014000000opp0-1417000000Tu@ Popp0-1508000000YA A opp0-1586000000^p 6 opp0-1625000000`ۈ@  opp0-1677000000c@5 opp0-1716000000fHf opp0-1781000000j'@opp0-1846000000nB@opp0-1924000000ropp0-1989000000v@opp-table-cluster1operating-points-v2$opp1-793000000/D8@ `opp1-9100000006= opp1-1014000000opp-689000000)N@ Popp-767000000-} A opp-8450000002]@ 6 opp-8710000003g  opp-92300000075 opp-9620000009Vf opp-1027000000=6opp-1092000000AB@opp-1144000000D0opp-1196000000GIccimediatek,mt8183-ccicciintermediate"cpus+cpu-mapcluster0core0$core1$core2$core3$cluster1core0$core1$core2$core3$cpu@0(cpuarm,cortex-a5348psciFYcpuintermediate iT@@!"cpu@1(cpuarm,cortex-a5348psciFYcpuintermediate iT@@!"cpu@2(cpuarm,cortex-a5348psciFYcpuintermediate iT@@!"cpu@3(cpuarm,cortex-a5348psciFYcpuintermediate iT@@!"cpu@100(cpuarm,cortex-a7348psciFY#cpuintermediate$i@@%"&cpu@101(cpuarm,cortex-a7348psciFY#cpuintermediate$i@@%"&cpu@102(cpuarm,cortex-a7348psciFY#cpuintermediate$i@@%"&cpu@103(cpuarm,cortex-a7348psciFY#cpuintermediate$i@@%"&idle-statespscicpu-sleeparm,idle-state&=N^ cluster-sleep-0arm,idle-state&=N^cluster-sleep-1arm,idle-state&=N^#l2-cache0cacheo@{!l2-cache1cacheo@{%opp-table-0operating-points-v2sopp-300000000 hopp-320000000 opp-340000000C <opp-360000000u* Ҧopp-380000000W opp-400000000ׄ zopp-420000000 opp-460000000k  Lopp-500000000e }opp-540000000 / `opp-580000000" 4opp-620000000$s opp-653000000&@ YFopp-698000000) opp-743000000,IG opp-800000000/ pmu-a53arm,cortex-a53-pmu '(pmu-a73arm,cortex-a73-pmu ')psci arm,psci-1.0?smcfixed-factor-clock-13mfixed-factor-clock*clk13m;oscillator fixed-clockclk26m*timerarm,armv8-timer '@   soc+ simple-busefuse@8000000%mediatek,mt8183-efusemediatek,efuse4+okayinterrupt-controller@c000000 arm,gic-v3 'P4   @ A B   'ppi-partitionsinterrupt-partition-0-(interrupt-partition-1-)syscon@c530000mediatek,mt8183-mcucfgsyscon4 Sinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirq '4 S Pcpu-debug@d410000&arm,coresight-cpu-debugarm,primecell4 A+. apb_pclk$cpu-debug@d510000&arm,coresight-cpu-debugarm,primecell4 Q+. apb_pclk$cpu-debug@d610000&arm,coresight-cpu-debugarm,primecell4 a+. apb_pclk$cpu-debug@d710000&arm,coresight-cpu-debugarm,primecell4 q+. apb_pclk$cpu-debug@d810000&arm,coresight-cpu-debugarm,primecell4 +. apb_pclk$cpu-debug@d910000&arm,coresight-cpu-debugarm,primecell4 +. apb_pclk$cpu-debug@da10000&arm,coresight-cpu-debugarm,primecell4 +. apb_pclk$cpu-debug@db10000&arm,coresight-cpu-debugarm,primecell4 +. apb_pclk$syscon@10000000 mediatek,mt8183-topckgensyscon4syscon@10001000 mediatek,mt8183-infracfgsyscon46+syscon@10003000mediatek,mt8183-pericfgsyscon40dpinctrl@10005000mediatek,mt8183-pinctrl4PDCiocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eintM]i, uSPI_AP_EC_CS_LSPI_AP_EC_MOSISPI_AP_EC_CLKI2S3_DOUSB_PD_INT_ODLIT6505_HPD_LI2S3_TDM_D3SOC_I2C6_1V8_SCLSOC_I2C6_1V8_SDADPI_D0DPI_D1DPI_D2DPI_D3DPI_D4DPI_D5DPI_D6DPI_D7DPI_D8DPI_D9DPI_D10DPI_D11DPI_HSYNCDPI_VSYNCDPI_DEDPI_CKAP_MSDC1_CLKAP_MSDC1_DAT3AP_MSDC1_CMDAP_MSDC1_DAT0AP_MSDC1_DAT2AP_MSDC1_DAT1OTG_ENDRVBUSDISP_PWMDSI_TELCM_RST_1V8AP_CTS_WIFI_RTSAP_RTS_WIFI_CTSSOC_I2C5_1V8_SCLSOC_I2C5_1V8_SDASOC_I2C3_1V8_SCLSOC_I2C3_1V8_SDASOC_I2C1_1V8_SDASOC_I2C0_1V8_SDASOC_I2C0_1V8_SCLSOC_I2C1_1V8_SCLAP_SPI_H1_MISOAP_SPI_H1_CS_LAP_SPI_H1_MOSIAP_SPI_H1_CLKI2S5_BCKI2S5_LRCKI2S5_DOBOOTBLOCK_EN_LMT8183_KPCOL0SPI_AP_EC_MISOUART_DBG_TX_AP_RXUART_AP_TX_DBG_RXI2S2_MCKI2S2_BCKCLK_5M_WCAMCLK_2M_UCAMI2S2_LRCKI2S2_DISOC_I2C2_1V8_SCLSOC_I2C2_1V8_SDASOC_I2C4_1V8_SCLSOC_I2C4_1V8_SDASCL8SDA8FCAM_PWDN_LI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICAP_FLASH_WP_LEC_AP_INT_ODLIT6505_INT_ODLH1_INT_OD_LAP_SPI_FLASH_MISOAP_SPI_FLASH_CS_LAP_SPI_FLASH_MOSIAP_SPI_FLASH_CLKDA7219_IRQ,audiopinspins-busDabefYZ[audiotdmoutonpins-bus audiotdmoutoffpins-bus bt-pinsFpins-bt-enxec-ap-int-odl]pins1h1-int-od-lRpins1i2c0Ipins-busRSi2c1[pins-busQTi2c2Npins-busghi2c3Ypins-bus23i2c4Lpins-busiji2c5_pins-bus01i2c6Hpins-bus  mmc0-pins-defaulthpins-cmd-dat${}~zpins-clk| pins-rst mmc0-pins-uhsipins-cmd-dat${}~zpins-clk| pins-ds pins-rstmmc1-pins-defaultlpins-cmd-dat "! pins-clk mmc1-pins-uhsmpins-cmd-dat "! pins-clk panel-pins-defaultwpanel-reset-pwm0-pin-defaultXpins1$pins2+scp:pins-scp-uartnpspi0Qpins-spiUVWXspi1Zpins-spispi2\pins-spi pins-spi-mi^ spi3^pins-spispi4`pins-spispi5apins-spi uart0-pins-defaultCpins-rx_pins-tx`uart1-pins-defaultDpins-rxypins-txspins-rts/0pins-cts.uart1-pins-sleepEpins-rxypins-txspins-rts/0pins-cts.wifi-pins-pwrseqpins-wifi-enablewwifi-pins-wakeuppins-wifi-wakeupqppvarp-lcd-enpins1Bppvarn-lcd-enpins1pp1800-lcd-enpins1$open_touchJirq_pinrst_pin$penejectpen_ejectsyscon@10006000)mediatek,mt8183-scpsyssysconsimple-mfd4`power-controller!mediatek,mt8183-power-controller+>Wpower-domain@04 +/+7audioaudio1audio2>power-domain@14R+>power-domain@24mfg+>d-power-domain@34+>d.power-domain@44>power-domain@54>power-domain@64R+>power-domain@74X////////// 5mmmm-0mm-1mm-2mm-3mm-4mm-5mm-6mm-7mm-8mm-9R+r0+>power-domain@84@11 11111.camcam-0cam-1cam-2cam-3cam-4cam-5cam-6R+r0>power-domain@94 "2 2ispisp-0isp-1R+r0>power-domain@104 r0>power-domain@114 r0>power-domain@124 @&#333333-vpuvpu1vpu-0vpu-1vpu-2vpu-3vpu-4vpu-5R+r0+>power-domain@134 $vpu2R+>power-domain@144%vpu3R+>watchdog@10007000mediatek,mt8183-wdt4p6fsyscon@1000c000"mediatek,mt8183-apmixedsyssyscon4Tpwrap@1000d000mediatek,mt8183-pwrap4Cpwrap )+ spiwrappmicmediatek,mt6358 ,mt6358codecmediatek,mt6358-sound4mt6358regulatormediatek,mt6358-regulator55555 55.5>5R5f5v567888buck_vdram1vdram1 L0*FZ7buck_vcorevcore j*FZbuck_vpavpa 7P*Zbuck_vproc11vproc11 j*FZ&buck_vproc12vproc12 j*FZbuck_vgpuvgpu  j*Zr-.buck_vs2vs2 L0*F8buck_vmodemvmodem j*FZbuck_vs1vs1B@'{l0*F6ldo_vdram2vdram2 'w@* Fldo_vsim1vsim1)2)2*ldo_vibrvibrO2Z*<ldo_vrf12vrf12OO*xldo_vio18vio18w@w@* Fkldo_vusbvusb-/M`*Feldo_vcamiovcamiow@w@*EOldo_vcamdvcamd w@*Eldo_vcn18vcn18w@w@*Mldo_vfe28vfe28***ldo_vsram_proc11 vsram_proc11 j*Fldo_vcn28vcn28***ldo_vsram_others vsram_others j*Fldo_vsram_gpu vsram_gpu PB@j*r.-ldo_vxo22vxo22!!*xFldo_vefusevefuse*ldo_vaux18vaux18w@w@*ldo_vmchvmch,@ 2Z*<ldo_vbif28vbif28***ldo_vsram_proc12 vsram_proc12 j*Fldo_vcama1vcama1w@-*Eldo_vemcvemc,@ 2Z*<jldo_vio28vio28***ldo_va12va12OO*Fldo_vrf18vrf18w@w@*xldo_vcn33vcn332Z5g*ldo_vcama2vcama2***EPldo_vmcvmcw@2Z*<ldo_vldo28vldo28*-*ldo_vaud28vaud28***4ldo_vsim2vsim2)2)2*rtcmediatek,mt6358-rtckeysmediatek,mt6358-keyspowerthomefkeyboard@10010000mediatek,mt6779-keypad4 *kpd disabledscp@10500000mediatek,mt8183-scp 4P\ Csramcfg +main9okaymediatek/mt8183/scp.imgdefault:~cros-ec-rpmsggoogle,cros-ec-rpmsgcros-ec-rpmsgtimer@10017000,mediatek,mt8183-timermediatek,mt6765-timer4p ;iommu@10205000mediatek,mt8183-m4u4 P  <=>?@ABumailbox@10238000mediatek,mt8183-gce4#@ '+gcetauxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc4+#main3okaySserial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart4  [ *+ baudbusokaydefaultCserial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart40 *+ baudbusokaydefaultsleepDEE\,ybluetoothdefaultFokayqcom,qca6174-bt O,xGnvm_00440302_i2s_eu.binserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart4@ ] *+ baudbus disabledi2c@11005000mediatek,mt8183-i2c 4P W+W+* maindma+okaydefaultHi2c@11007000mediatek,mt8183-i2c 4p Q+ +* maindma+okaydefaultItouchscreen@5dgoodix,gt7375p4]defaultJ , \,Ki2c@11008000mediatek,mt8183-i2c 4 R+ +*+G maindmaarb+okaydefaultLhMeeprom@54 atmel,24c324Tt }Mi2c@11009000mediatek,mt8183-i2c 4 S+ +*+I maindmaarb+okaydefaultNhOeeprom@58 atmel,24c324Xt }Pspi@1100a000mediatek,mt8183-spi+4 x6+parent-clksel-clkspi-clkokaydefaultQ ,Vtpm@0 google,cr504B@defaultR ,thermal@1100b000mediatek,mt8183-thermal4 + +# thermauxadc+ LSTUcalibration-datasvs@1100bc00mediatek,mt8183-svs4 + mainVU(svs-calibration-datat-calibration-datapwm@1100e000mediatek,mt8183-disp-pwm4 W#+5mainmmokaydefaultXpwm@11006000mediatek,mt8183-pwm4`#0++++++topmainpwm1pwm2pwm3pwm4i2c@1100f000mediatek,mt8183-i2c 4 T+ +* maindma+okaydefaultYspi@11010000mediatek,mt8183-spi+4 |6+8parent-clksel-clkspi-clkokaydefaultZflash@0winbond,w25q64dwjedec,spi-nor4}x@i2c@11011000mediatek,mt8183-i2c 4 U+9+* maindma+okaydefault[spi@11012000mediatek,mt8183-spi+4  6+;parent-clksel-clkspi-clkokaydefault\cros-ec@0google,cros-ec-spi4- ,default]i2c-tunnelgoogle,cros-ec-i2c-tunnel.+sbs-battery@bsbs,sbs-battery4 @Textcon0google,extcon-usbc-cros-ecitypecgoogle,cros-ec-typec+connector@0usb-c-connector4|dualhostsinkcbasgoogle,cros-cbaskeyboard-controllergoogle,cros-ec-keyb-switchesspi@11013000mediatek,mt8183-spi+40 6+<parent-clksel-clkspi-clk disableddefault^i2c@11014000mediatek,mt8183-i2c 4@ +H+*+G maindmaarb+ disabledi2c@11015000mediatek,mt8183-i2c 4P +J+*+I maindmaarb+ disabledi2c@11016000mediatek,mt8183-i2c 4` V+D+*+E maindmaarb+okaydefault_i2c@11017000mediatek,mt8183-i2c 4p +F+*+E maindmaarb+ disabledspi@11018000mediatek,mt8183-spi+4 6+Kparent-clksel-clkspi-clk disableddefault`spi@11019000mediatek,mt8183-spi+4 6+Lparent-clksel-clkspi-clk disableddefaultai2c@1101a000mediatek,mt8183-i2c 4 X+b+* maindma+ disabledi2c@1101b000mediatek,mt8183-i2c 4 Y+c+* maindma+ disabledusb@11201000#mediatek,mt8183-mtu3mediatek,mtu3 4 . > Cmacippc Hbc+=+Zsys_ckref_ck d e+okayhosteusb@11200000'mediatek,mt8183-xhcimediatek,mtk-xhci4 Cmac I+=+Zsys_ckref_ckokay+ehub@1 usb5e3,6104audio-controller@11220000 mediatek,mt8183-audiosyssyscon4"gmt8183-afe-pcmmediatek,mt8183-audio f audiosysWDggggg ggggg g g g gg+/+7  0HLKOtuvwxyz{|}~*waud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adc_adda6_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_i2s1_bclk_swaud_i2s2_bclk_swaud_i2s3_bclk_swaud_i2s4_bclk_swaud_tdm_clkaud_tml_clkaud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_aud_intbustop_syspll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_clk26m_clkmmc@11230000mediatek,mt8183-mmc 4# M++sourcehclksource_cgokaydefaultstate_uhshEi    ) 1 7( Fj Rk _ oU mmc@11240000mediatek,mt8183-mmc 4$ N ++(sourcehclksource_cgokaydefaultstate_uhslEm Fn Ro p         1 _  oV+qca-wifi@1 qcom,ath10k4 GO_KATSUdsi-phy@11e50000mediatek,mt8183-mipi-tx4T  mipi_tx0_pllqcalibration-dataokay vefuse@11f10000%mediatek,mt8183-efusemediatek,efuse4+calib@1804 Ucalib@1904 qcalib@5804dVt-phy@11f40000.mediatek,mt8183-tphymediatek,generic-tphy-v2+okayusb-phy@04*ref  8okaybusb-phy@7004 *ref okaycsyscon@13000000mediatek,mt8183-mfgcfgsyscon4Wrgpu@13040000'mediatek,mt8183b-maliarm,mali-bifrost4@$ HjobmmugpurWWW Xcore0core1core2s k.syscon@14000000mediatek,mt8183-mmsyssyscon46 wtt ~t/dma-controller0@14001000mediatek,mt8183-mdp3-rdma4 ~t W/ / u wtt mdp3-rsz0@14003000mediatek,mt8183-mdp3-rsz40 ~t0 /mdp3-rsz1@14004000mediatek,mt8183-mdp3-rsz4@ ~t@ /dma-controller@14005000mediatek,mt8183-mdp3-wrot4P ~tP !W/ u mdp3-wdma@14006000mediatek,mt8183-mdp3-wdma4` ~t` "W/) uovl@14008000mediatek,mt8183-disp-ovl4 W/ u ~tovl@14009000mediatek,mt8183-disp-ovl-2l4 W/ u ~tovl@1400a000mediatek,mt8183-disp-ovl-2l4 W/ u ~trdma@1400b000mediatek,mt8183-disp-rdma4 W/ u  ~trdma@1400c000mediatek,mt8183-disp-rdma4 W/ u  ~tcolor@1400e0006mediatek,mt8183-disp-colormediatek,mt8173-disp-color4 W/ ~tccorr@1400f000mediatek,mt8183-disp-ccorr4 W/ ~taal@14010000mediatek,mt8183-disp-aal4 W/ ~tgamma@14011000mediatek,mt8183-disp-gamma4 W/ ~tdither@14012000mediatek,mt8183-disp-dither4  W/ ~t dsi@14014000mediatek,mt8183-dsi4@ W// venginedigitalhs/v dphyokay+panel@04 O,-defaultw x y z { okaystarry,2081101qfh032011-53gportendpoint |}portsportendpoint }|mutex@14016000mediatek,mt8183-disp-mutex4` W  ~t`larb@14017000mediatek,mt8183-smi-larb4pr0//Wapbsmi<smi@14019000mediatek,mt8183-smi-common4 ////apbsmigals0gals1W0mdp3-ccorr@1401c000mediatek,mt8183-mdp3-ccorr4 ~t 1/+syscon@15020000mediatek,mt8183-imgsyssyscon42larb@15021000mediatek,mt8183-smi-larb4r02 2 / apbsmigalsW Alarb@1502f000mediatek,mt8183-smi-larb4r022/  apbsmigalsW >syscon@16000000mediatek,mt8183-vdecsyssyscon4video-codec@16020000mediatek,mt8183-vcodec-dec4 0@Phpx(Cmiscldtopcmadavpphwdhwqhwbhwg 8 u u!u"u#u$u%u& '~ 4W vdeclarb@16010000mediatek,mt8183-smi-larb4r0apbsmiW =syscon@17000000mediatek,mt8183-vencsyssyscon4larb@17010000mediatek,mt8183-smi-larb4r0apbsmiW @venc_jpg@17030000+mediatek,mt8183-jpgencmediatek,mtk-jpgenc4  uuW jpgencsyscon@19000000 mediatek,mt8183-ipu_connsyscon43syscon@19010000mediatek,mt8183-ipu_adlsyscon4syscon@19180000!mediatek,mt8183-ipu_core0syscon4syscon@19280000!mediatek,mt8183-ipu_core1syscon4(syscon@1a000000mediatek,mt8183-camsyssyscon41larb@1a001000mediatek,mt8183-smi-larb4r011/ apbsmigalsWBlarb@1a002000mediatek,mt8183-smi-larb4 r01 1 / apbsmigalsW?thermal-zonescpu-thermal Ed [ i ytripstrip-point0   Epassivetrip-point1 8 Epassivecpu-crit 8  Ecriticalcooling-mapsmap0 0  map1 0  tzts1 E [ i ytripscooling-mapstzts2 E [ i ytripscooling-mapstzts3 E [ i ytripscooling-mapstzts4 E [ i ytripscooling-mapstzts5 E [ i ytripscooling-mapstztsABB E [ i ytripscooling-mapstboard1 [ E itboard2 [ E ichosen serial0:115200n8backlight_lcd0pwm-backlight    O,   @okay{memory@40000000(memory4@oscillator1 fixed-clockclk32kGregulator0regulator-fixed it6505_pp18w@w@ #, (regulator1regulator-fixed lcd_pp33002Z2ZF ;Kregulator2regulator-fixed bl_pp5000LK@LK@F ;regulator3regulator-fixed mmc1_power2Z2Znregulator4regulator-fixedmmc1_iow@w@oregulator5regulator-fixed pp1800_alwF ;w@w@regulator6regulator-fixed pp3300_alwF ;2Z2Zregulator-vsysregulator-fixedvsysF ;5reserved-memory+memory@50000000shared-dma-pool4P M9mt8183-sound T'defaultaud_tdm_out_onaud_tdm_out_offE fokay'mediatek,mt8183_mt6358_ts3a227_rt1015pbt-sco linux,bt-scowifi-pwrseqmmc-pwrseq-simpledefault \,wpwifi-wakeup gpio-keysdefaultbutton-wowlan pWake on WiFi V,q vthermal-sensor1generic-adc-thermal S sensor-channel x'.:N lau07@{P(`ap/$8L_sy(hZ8NCH;thermal-sensor2generic-adc-thermal S sensor-channel x'.:N lau07@{P(`ap/$8L_sy(hZ8NCH;ppvarn-lcdregulator-fixed ppvarn_lcddefault ( #,Bxppvarp-lcdregulator-fixed ppvarp_lcddefault ( #,ypp1800-lcdregulator-fixed pp1800_lcddefault ( #,$zgpio-keys gpio-keysdefaultswitch-pen-insert pPen Insert V, v  rt1015prealtek,rt1015p , compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11ovl0ovl-2l0ovl-2l1rdma0rdma1serial0mmc0mmc1opp-sharedphandleopp-hzopp-microvoltrequired-oppsclocksclock-namesoperating-points-v2proc-supplycpudevice_typeregenable-methodcapacity-dmips-mhzcpu-idle-statesdynamic-power-coefficienti-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterrupts#clock-cellsclock-divclock-multclock-output-namesclock-frequencyrangesstatus#interrupt-cellsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxdrive-strengthinput-enablebias-pull-downoutput-lowbias-pull-upmediatek,pull-up-advmediatek,drive-strength-advbias-disablemediatek,pull-down-advoutput-highoutput-enable#power-domain-cellsmediatek,infracfgdomain-supplymediatek,smiinterrupts-extendedmediatek,dmic-modeAvdd-supplyvsys-ldo1-supplyvsys-ldo2-supplyvsys-ldo3-supplyvsys-vcore-supplyvsys-vdram1-supplyvsys-vgpu-supplyvsys-vmodem-supplyvsys-vpa-supplyvsys-vproc11-supplyvsys-vproc12-supplyvsys-vs1-supplyvsys-vs2-supplyvs1-ldo1-supplyvs2-ldo1-supplyvs2-ldo2-supplyvs2-ldo3-supplyvs2-ldo4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onregulator-allowed-modesregulator-coupled-withregulator-coupled-max-spreadlinux,keycodeswakeup-sourcememory-regionfirmware-namepinctrl-namespinctrl-0mediatek,rpmsg-namemediatek,larbs#iommu-cells#mbox-cells#io-channel-cellspinctrl-1enable-gpiosreset-gpiosvbus-supplypagesizevcc-supplymediatek,pad-selectcs-gpiosspi-max-frequency#thermal-sensor-cellsresetsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namespower-domains#pwm-cellsgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-idpower-roledata-roletry-power-rolephysmediatek,syscon-wakeupdr_modevusb33-supplyreset-namesbus-widthcap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-resetno-sdiono-sdhs400-ds-delayvmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-parentsnon-removablemmc-pwrseqcap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104keep-power-in-suspendcap-sdio-irqno-mmcqcom,ath10k-calibration-variant#phy-cellsdrive-strength-microampmediatek,discthinterrupt-namespower-domain-namesmali-supplymboxesmediatek,gce-client-regmediatek,gce-eventsiommus#dma-cellsmediatek,rdma-fifo-sizephy-namesavdd-supplyavee-supplypp1800-supplybacklightrotationremote-endpointmediatek,scpmediatek,vdecsyspolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionstdout-pathpwmspower-supplybrightness-levelsnum-interpolated-stepsdefault-brightness-levelgpioenable-active-highregulator-boot-onno-mapmediatek,platformpinctrl-2labellinux,codeio-channelsio-channel-namestemperature-lookup-tablelinux,input-typewakeup-event-actionsdb-gpios