]r8X((JW(,haoyu,marsboard-rk3066rockchip,rk3066a7MarsBoard RK3066aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000oscillator ,fixed-clockn6xin24mgpu@10090000",rockchip,rk3066-maliarm,mali-400  buscorex disabledx5!gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu31cache-controller@10138000,arm,pl310-cache?MY8scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gicavYserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ "baudclkapb_pclk@Lokaytxrxdefaultserial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` #baudclkapb_pclkAMokaytxrxdefaultqos@1012d000,rockchip,rk3066-qossyscon Y!qos@1012e000,rockchip,rk3066-qossyscon Y qos@1012f000,rockchip,rk3066-qossyscon Yqos@1012f080,rockchip,rk3066-qossyscon Yqos@1012f100,rockchip,rk3066-qossyscon Yqos@1012f180,rockchip,rk3066-qossyscon Yqos@1012f200,rockchip,rk3066-qossyscon Yqos@1012f280,rockchip,rk3066-qossyscon Yusb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@  usb2-phyokayusb@101c0000 ,snps,dwc2 otghost usb2-phyokayethernet@10204000,rockchip,rk3066-emac @<  D hclkmacrefd#rmiiokay, 0 default  ethernet-phy@0Y mmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciurx-tx;QFresetokayRdefault`mmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciurx-tx;RFreset disableddefaultmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciurx-tx;SFreset disablednand-controller@10500000,rockchip,rk2928-nfcP@ ahb disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-model@sRBRBRB RBpower-controller!,rockchip,rk3066-power-controllerYpower-domain@7POpower-domain@6  power-domain@8!grf@20008000,syscon Y dma-controller@20018000,arm,pl330arm,primecell @ apb_pclkYdma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk disabledi2c@2002d000,rockchip,rk3066-i2c  ( i2cP disableddefault"i2c@2002f000,rockchip,rk3066-i2c  ) Qi2cokaydefault#tps@2d-$% %%%%1&=&I%U% ,ti,tps65910regulatorsregulator@0bvcc_rtcqvrtcregulator@1bvcc_ioqvioY&regulator@2bvdd_arm '`qvdd1Y9regulator@3bvcc_ddr '`qvdd2regulator@5 bvcc18_cifqvdig1regulator@6bvdd_11qvdig2regulator@7bvcc_25qvpllregulator@8bvcc_18qvdacregulator@9 bvcc25_hdmiq vaux1regulator@10bvcca_33q vaux2regulator@11 bvcc_rmii vaux33Y regulator@12 bvcc28_cifq vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm F disableddefault'pwm@20030010,rockchip,rk2928-pwm F disableddefault(watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  G disableddefault)pwm@20050030,rockchip,rk2928-pwm 0Gokaydefault*YGi2c@20056000,rockchip,rk3066-i2c ` * Ri2c disableddefault+i2c@2005a000,rockchip,rk3066-i2c  + Si2c disableddefault,i2c@2005e000,rockchip,rk3066-i2c  4 Ti2c disableddefault-serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ $baudclkapb_pclkBNokaytxrxdefault.serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  %baudclkapb_pclkCOokay txrxdefault/saradc@2006c000,rockchip,saradc  GJsaradcapb_pclkW Fsaradc-apb disabledspi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &   txrx disableddefault0123spi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @  txrx disableddefault4567dma-controller@20078000,arm,pl330arm,primecell @ apb_pclkYcpusrockchip,rk3066-smpcpu@0cpu,arm,cortex-a988$@ Oa* s* 'g85@C9cpu@1cpu,arm,cortex-a98C9display-subsystem,rockchip,display-subsystemN:;sram@10080000 ,mmio-sram Tsmp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop  aclk_vopdclk_vophclk_vop1def Faxiahbdclk disabledportY:endpoint@0[<Y@vop@1010e000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vop1ghi Faxiahbdclk disabledportY;endpoint@0[=YAhdmi@10116000,rockchip,rk3066-hdmi`  @hclkdefault>?1  disabledportsport@0endpoint@0[@Y<endpoint@1[AY=port@1i2s@10118000,rockchip,rk3066-i2s  defaultBKi2s_clki2s_hclktxrxk disabledi2s@1011a000,rockchip,rk3066-i2s   defaultCLi2s_clki2s_hclktxrxk disabledi2s@1011c000,rockchip,rk3066-i2s  defaultDMi2s_clki2s_hclk  txrxk disabledclock-controller@20000000,rockchip,rk3066a-cru  @^_ ׄ#gрxhрxhYtimer@2000e000,snps,dw-apb-timer-osc  .VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer-osc  ,TB timerpclktimer@2003a000,snps,dw-apb-timer-osc  -UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk \ Fsaradc-apb disabledphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy okayusb-phy@17c|QphyclkYusb-phy@188RphyclkYpinctrl,rockchip,rk3066a-pinctrl Tgpio0@20034000,rockchip,gpio-bank @ 6Uavgpio1@2003c000,rockchip,gpio-bank  7VavYgpio2@2003e000,rockchip,gpio-bank  8Wavgpio3@20080000,rockchip,gpio-bank  9XavYHgpio4@20084000,rockchip,gpio-bank @ :Yavgpio6@2000a000,rockchip,gpio-bank  <ZavY$pcfg_pull_defaultYFpcfg_pull_noneYEemacemac-xferEEEEEEEEY emac-mdio EEY emmcemmc-clkFemmc-cmd Femmc-rst Fhdmihdmi-hpdFY?hdmii2c-xfer EEY>i2c0i2c0-xfer EEY"i2c1i2c1-xfer EEY#i2c2i2c2-xfer EEY+i2c3i2c3-xfer EEY,i2c4i2c4-xfer EEY-pwm0pwm0-outEY'pwm1pwm1-outEY(pwm2pwm2-outEY)pwm3pwm3-outEY*spi0spi0-clkFY0spi0-cs0FY3spi0-txFY1spi0-rxFY2spi0-cs1Fspi1spi1-clkFY4spi1-cs0FY7spi1-rxFY6spi1-txFY5spi1-cs1Fuart0uart0-xfer FFYuart0-ctsFuart0-rtsFuart1uart1-xfer FFYuart1-ctsFuart1-rtsFuart2uart2-xfer F FY.uart3uart3-xfer FFY/uart3-ctsFuart3-rtsFsd0sd0-clkFYsd0-cmd FYsd0-cdFYsd0-wpFsd0-bus-width1 Fsd0-bus-width4@ F F F FYsd1sd1-clkFYsd1-cmdFYsd1-cdFYsd1-wpFsd1-bus-width1Fsd1-bus-width4@FFFFYi2s0i2s0-busFF F F F F FFFYBi2s1i2s1-bus`FFFFFFYCi2s2i2s2-bus`FFFFFFYDlan8720aphy-intEYmemory@60000000memory`@vdd-log,pwm-regulator Gbvdd_logOOqB@dO*okaysdmmc-regulator,regulator-fixed bsdmmc-supply-- )H.?&Yvsys-regulator,regulator-fixedbvsysLK@LK@Y% #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1clock-frequency#clock-cellsclock-output-namesregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelphandleinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyfifo-depthreset-namesmax-frequencyvmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supply