8(;DH Electronics STM32MP157C DHCOM Premium Developer Kit (2)A!dh,stm32mp157c-dhcom-pdk2dh,stm32mp157c-dhcom-somst,stm32mp157cpuscpu@0!arm,cortex-a7,&6Hrxtx disabledaudio-controller@4000c000!st,stm32h7-i2sYH@ 3 C=>Hrxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxYH@ kclk a C]^ Hrxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@ &  disabledserial@4000f000!st,stm32h7-uartH@ ' okay5default+serial@40010000!st,stm32h7-uartH@ 4 okay5default+serial@40011000!st,stm32h7-uartH@ 5  disabledi2c@40012000!st,stm32mp15-i2cH@  jeventerror  RL z disabledi2c@40013000!st,stm32mp15-i2cH@0 jeventerror!" RL zokay5default+ i2c@40014000!st,stm32mp15-i2cH@@ jeventerrorHI RL z disabledi2c@40015000!st,stm32mp15-i2cH@P jeventerrorkl RL zokay5default+ codec@a !fsl,sgtl5000H Y   portendpoint@0Hyendpoint@1Hypolytouch@38!edt,edt-ft5x06H8 cec@40016000 !st,stm32-cecH@` ^   cechdmi-cecokay5default+dac@40017000!st,stm32h7-dac-coreH@p pclkokay5default+dac@1 !st,stm32-dac$Hokaydac@2 !st,stm32-dac$Hokayserial@40018000!st,stm32h7-uartH@ R  disabledserial@40019000!st,stm32h7-uartH@ S okay5default+timer@44000000!st,stm32-timersHD intpC   Hch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwm  disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD intpC/012345Hch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwm  disabledtimer@7!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 G  disabledspi@44004000!st,stm32h7-spiHD@ # RLH C%&Hrxtx disabledaudio-controller@44004000!st,stm32h7-i2sYHD@ # C%&Hrxtx disabledspi@44005000!st,stm32h7-spiHDP T RLI CSTHrxtx disabledtimer@44006000!st,stm32-timersHD` int@CijklHch1uptrigcom disabledpwm !st,stm32-pwm  disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp int CmnHch1up disabledpwm !st,stm32-pwm  disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD int CopHch1up disabledpwm !st,stm32-pwm  disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD U RLJ CUVHrxtx disabledsai@4400a000!st,stm32h7-sai DHDD WRLP disabledaudio-controller@4400a004Y!st,stm32-sai-sub-aH sai_ckCW disabledaudio-controller@4400a024Y!st,stm32-sai-sub-bH$ sai_ckCX disabledsai@4400b000!st,stm32h7-sai DHDD [RLQokay *pclkx8kx11k5defaultsleep+6audio-controller@4400b004Y!st,stm32-sai-sub-aH sai_ckCYokayHtxyporty]endpoint@i2sGO`yaudio-controller@4400b024Y!st,stm32-sai-sub-bH$   sai_ckMCLKCZokayHrxsporty^endpoint@i2sGO`ysai@4400c000!st,stm32h7-sai DHDD rRLR disabledaudio-controller@4400c004Y!st,stm32-sai-sub-aH sai_ckCq disabledaudio-controller@4400c024Y!st,stm32-sai-sub-bH$ sai_ckCr disableddfsdm@4400d000!st,stm32mp1-dfsdmHD dfsdm disabledfilter@0!st,stm32-dfsdm-adc$H nCeHrx disabledfilter@1!st,stm32-dfsdm-adc$H oCfHrx disabledfilter@2!st,stm32-dfsdm-adc$H pCgHrx disabledfilter@3!st,stm32-dfsdm-adc$H qChHrx disabledfilter@4!st,stm32-dfsdm-adc$H sC[Hrx disabledfilter@5!st,stm32-dfsdm-adc$H ~C\Hrx disableddma-controller@48000000 !st,stm32-dmaHH`   / GRL{ydma-controller@48001000 !st,stm32-dmaHH`89:;<DEF HRL{ydma-router@48002000!st,stm32h7-dmamuxHH { IRLyadc@48003000!st,stm32mp1-adc-coreHH0Z JbusadcdSokay y adc@0!st,stm32mp1-adc$H C Hrxokayadc@100!st,stm32mp1-adc$H C Hrxokaysdmmc@48004000!arm,pl18xarm,primecell1HH@ jcmd_irq x apb_pclkRL1'okay5defaultopendrainsleep+!6"?#IS_i u usb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI otgRLdwc2 b  @@@@  peripheral$okay% usb2-phymailbox@4c001000!st,stm32mp1-ipccHL,de&= jrxtxwakeup SokayyVdcmi@4c006000!st,stm32-dcmiHL` NRM MmclkCK Htx disabledrcc@50000000!st,stm32mp1-rccsysconHPypwr@50001000!st,stm32mp1,pwr-regHP ('reg11=reg11LdyDreg18=reg18Lw@dw@yEusb33=usb33L2Zd2Zy$pwr_mcu@50001014!sysconHPyOinterrupt-controller@5000d000!st,stm32mp1-extisyscondSHPy&syscon@50020000!st,stm32mp157-syscfgsysconHP 3ytimer@50021000!st,stm32-lptimerHP mux disabledpwm!st,stm32-pwm-lp  disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  mux disabledpwm!st,stm32-pwm-lp  disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 mux disabledpwm!st,stm32-pwm-lp  disabledtimer@50024000!st,stm32-lptimerHP@ mux disabledpwm!st,stm32-pwm-lp  disabledvrefbuf@50025000!st,stm32-vrefbufHPPL`d&% 4 disabledsai@50027000!st,stm32h7-sai PpHPpPs RL disabledaudio-controller@50027004Y!st,stm32-sai-sub-aH sai_ckCc disabledaudio-controller@50027024Y!st,stm32-sai-sub-bH$ sai_ckCd disabledthermal@50028000!st,stm32-thermalHP  5pclk|okayyhash@54002000!st,stm32f756-hashHT  P aR C( Hin disabledrng@54003000 !st,stm32-rngHT0 |R okaydma-controller@58000000!st,stm32h7-mdmaHX z dR { 0y(nand-controller@58002000!st,stm32mp15-fmc28HX  0HC( ( (  Htxrxecc yR  disabledspi@58003000!st,stm32f469-qspiHX0p qspiqspi_mm \0C((Htxrx zR okay5defaultsleep +)*+ 6,-.mx66l51235l@0!jedec,spi-norHosdmmc@58005000!arm,pl18xarm,primecell1HXP 1jcmd_irq v apb_pclkR 1'okay5defaultopendrainsleep+/0610?23IS_i4sdmmc@58007000!arm,pl18xarm,primecell1HXp |jcmd_irq w apb_pclkR 1'okay5defaultopendrainsleep+56676?89S_i u crc@58009000!st,stm32f7-crcHX n disabledstmmac-axi-configy:ethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  stmmaceth=jmacirq.stmmacethmac-clk-txmac-clk-rxeth-ckethstp( igh{p)3DMh:xokay+;6<5defaultsleeprmiid= >mdio0!snps,dwmac-mdioethernet-phy@1Hy=usbh-ohci@5800c000 !generic-ohciHX oR  J disabledy?usbh-ehci@5800d000 !generic-ehciHX oR  K?okay@display-controller@5a001000!st,stm32-ltdcHZXY lcdR okay5defaultsleep+A6BportendpointCy\watchdog@5a002000!st,stm32mp1-iwdgHZ  : pclklsiokay usbphyc@5a006000!st,stm32mp1-usbphycHZ` R okayusb-phy@0H'DEy@usb-phy@1H'DEy%serial@5c000000!st,stm32h7-uartH\ %  disabledspi@5c001000!st,stm32h7-spiH\ V R @0C("(#Hrxtx disabledi2c@5c002000!st,stm32mp15-i2cH\  jeventerror_` R B zokay5default+Frtc@32!microcrystal,rv8803H2stpmic@33 !st,stpmic1H3 GdSokayregulators!st,stpmic1-regulators  $H0 < HIWIbuck1=vddcoreL 5dpfzbuck2=vdd_ddrLpdpfzyHbuck3=vddL2Zd2Zfzy buck4=v3v3L2Zd2Zfzy ldo1=vddaL,@ d,@ yldo2=v2v8L*d*ldo3=vtt_ddrL d qfldo4=vdd_usbL2Zd2Zy'ldo5=vdd_sdL,@ d,@ y4ldo6=v1v8Lw@dw@vref_ddr =vref_ddrfboost=bst_outyIpwr_sw1 =vbus_otg pwr_sw2=vbus_sw onkey!st,stpmic1-onkeyjonkey-fallingonkey-rising okaywatchdog!st,stpmic1-wdt disabledtouchscreen@49 !ti,tsc2004HI  >eeprom@50 !atmel,24c02HP rtc@5c004000!st,stm32mp1-rtcH\@ A pclkrtc_ck okayefuse@5c005000!st,stm32mp15-bsecH\Pcalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ jeventerror R C z  disabledpin-controller@50002000!st,stm32mp157-pinctrl P & &`'yJgpio@500020002BdSH TNGPIOAokay[bJyGgpio@500030002BdSH UNGPIOBokay[bJgpio@500040002BdSH  VNGPIOCokay[bJ gpio@500050002BdSH0 WNGPIODokay[bJ0yZgpio@500060002BdSH@ XNGPIOEokay[bJ@gpio@500070002BdSHP YNGPIOFokay[bJPyYgpio@500080002BdSH` ZNGPIOGokay[bJ`ygpio@500090002BdSHp [NGPIOHokay[bJpy>gpio@5000a0002BdSH \NGPIOIokay[bJyXgpio@5000b0002BdSH ]NGPIOJokay[bJgpio@5000c0002BdSH ^NGPIOKokay[bJadc1-in6-0pinsn\adc12-ain-0pinsn#\]^adc12-ain-1pinsn\]adc12-usb-cc-pins-0pinsncec-0ypinsnucec-sleep-0pinsncec-1pinsnucec-sleep-1pinsndac-ch1-0ypinsndac-ch2-0ypinsndcmi-0pins<nxyz{|~Fwudcmi-sleep-0pins<nxyz{|~Fwrgmii-0pins1 ne d m n " B  ! upins2n upins3n$ %     urgmii-sleep-0pins1<nedmn"B!$%rgmii-1pins1 ne d m n " B  ! upins2n upins3n$ % v w   urgmii-sleep-1pins1<nedmn"B!$%vwrgmii-2pins1 ne d  n " B k ! upins2n upins3n$ % v    urgmii-sleep-2pins1<nedn"Bk!$%vrmii-0y;pins1nm n   ! upins2 n$ %  urmii-sleep-0y<pins1$nmn!$%fmc-0pins14n4 5 ; < > ? 0 1 G H I J i upins2n6 fmc-sleep-0pins8n45;<>?01GHIJ6ii2c1-0pinsn<_ui2c1-sleep-0pinsn<_i2c1-1pinsn^_ui2c1-sleep-1pinsn^_i2c2-0y pinsntuui2c2-sleep-0pinsntui2c2-1pinsnuui2c2-sleep-1pinsnui2c2-2pinsnQuui2c2-sleep-2pinsnQui2c5-0y pinsn  ui2c5-sleep-0pinsn  i2c5-1pinsn01ui2c5-sleep-1pinsn01i2s2-0pins n ui2s2-sleep-0pins n ltdc-0pinspngZrsxyz |OEF}~9lj:8ultdc-sleep-0pinspngZrsxyz |OEF}~9lj:8ltdc-1yApinspnultdc-sleep-1yBpinspnltdc-2pins1Tn  36:KLMOt xyz}upins2nNultdc-sleep-2pins1Xn 36:KLMOtxyz}Nltdc-3pins1ngupins2lnMmsxy{|OE}Kt h9lj:Lultdc-sleep-3pinspngMmsxy{|OE}Kth9lj:Lm-can1-0yLpins1n} upins2n um_can1-sleep-0yMpinsn}m-can1-1pins1n upins2n um_can1-sleep-1pinsn  m-can2-0pins1n upins2n um_can2-sleep-0pinsnpwm1-0pins nIKNpwm1-sleep-0pins nIKNpwm2-0ypinsnpwm2-sleep-0pinsnpwm3-0pinsn'pwm3-sleep-0pinsn'pwm3-1pinsnupwm3-sleep-1pinsnpwm4-0pinsn>?pwm4-sleep-0pinsn>?pwm4-1pinsn=pwm4-sleep-1pinsn=pwm5-0pinsn{pwm5-sleep-0pinsn{pwm5-1pins n{|upwm5-sleep-1pins n{|pwm8-0pinsnpwm8-sleep-0pinsnpwm12-0pinsnvpwm12-sleep-0pinsnvqspi-clk-0y)pinsnZ uqspi-clk-sleep-0y,pinsnZqspi-bk1-0y*pins1nX Y W V upins2n qspi-bk1-sleep-0y-pinsnXYWVqspi-bk2-0y+pins1nr s j g upins2n qspi-bk2-sleep-0y.pinsnrsjg sai2a-0pinsn @ usai2a-sleep-0pinsn@sai2a-1ypins1 n = usai2a-sleep-1ypins n=sai2a-4pins n= ; < upins1n[ usai2a-5pins n=;<sai2b-0pins1 nL M N upins2n[ usai2b-sleep-0pinsn[LMNsai2b-1ypinsn[ usai2b-sleep-1ypinsn[sai2a-sleep-5pinsn[sai4a-0pinsn usai4a-sleep-0pinsnsdmmc1-b4-0y/pins1n( ) * + 2 upins2n, usdmmc1-b4-od-0y1pins1n( ) * + upins2n, upins3n2 usdmmc1-b4-sleep-0y2pinsn()*+,2sdmmc1-dir-0y0pins1 nR '  pins2nD sdmmc1-dir-sleep-0y3pinsnR'Dsdmmc1-dir-1pins1 nR N  pins2nD sdmmc1-dir-sleep-1pinsnRNDsdmmc2-b4-0y5pins1n    f pins2nC sdmmc2-b4-od-0y7pins1n    pins2nC pins3nf sdmmc2-b4-sleep-0y8pinsnCfsdmmc2-b4-1pins1n    f upins2nC usdmmc2-b4-od-1pins1n    upins2nC upins3nf usdmmc2-d47-0y6pinsn E 3 sdmmc2-d47-sleep-0y9pinsn E3sdmmc2-d47-1pinsn & ' usdmmc2-d47-sleep-1pinsn &'sdmmc2-d47-2pinsn  & ' sdmmc2-d47-sleep-2pinsn&'sdmmc3-b4-0y!pins1nP T U 7 Q pins2no sdmmc3-b4-od-0y"pins1nP T U 7 pins2no pins3nQ sdmmc3-b4-sleep-0y#pinsnPTU7oQsdmmc3-b4-1pins1nP T 5 7 0 pins2no sdmmc3-b4-od-1pins1nP T 5 7 pins2no pins3n0 sdmmc3-b4-sleep-1pinsnPT57o0spdifrx-0pinsnl uspdifrx-sleep-0pinsnlspi2-0pins1nupins2nuuart4-0ypins1nkupins2n uuart4-1pins1n1 upins2n uuart4-2pins1nkupins2n uuart7-0pins1nHupins2 nGJIuuart7-1pins1nWupins2nVuuart8-0ypins1nA upins2n@ uspi4-0pinsnLFupins2nMuusart2-0pins1nU4upins2n63uusart2-sleep-0pinsnU463usart2-1pins1nUupins2nTOuusart2-sleep-1pinsnUTOusart3-0ypins1nupins2n uusbotg-hs-0pinsn usbotg-fs-dp-dm-0pinsn  pin-controller-z@54004000!st,stm32mp157-z-pinctrl T@& &`'yKgpio@540040002BdSH _NGPIOZ okay[bKi2c2-0pinsnui2c2-sleep-0pinsni2c4-0yFpinsnui2c4-sleep-0pinsnspi1-0pins1nupins2nucan@4400e000 !bosch,m_canHDDm_canmessage_ram jint0int1  hclkcclk  okay5defaultsleep+L6Mcan@4400f000 !bosch,m_canHDD(m_canmessage_ram jint0int1  hclkcclk   disabledgpu@59000000 !vivante,gcHY m e~ buscoreR dsi@5a000000 !st,stm32-dsiHZ Npclkrefpx_clkR apb disabledportscryp@54001000!st,stm32mp1-crypHT O `R  disabledahb!st,mlahbsimple-bus$800m4@10000000!st,stm32mp1-m4H08R !    Ookay!PQRSTU/VVV6vq0vq1shutdown&Dmemory@c0000000