C88<( 8Hgumstix,omap4-duovero-parlorgumstix,omap4-duoveroti,omap4430ti,omap4 +#7OMAP4430 Gumstix Duovero on ParlorchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0B]/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Be/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bm/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bu/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 }/connectorcpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gicH$H$ l2-cache-controller@48242000arm,pl310-cacheH$  .local-timer@48240600arm,cortex-a9-twd-timerH$  :  interrupt-controller@48281000ti,omap4-wugen-mpuH( socti,omap-inframpu ti,omap4-mpumpuEdsp ti,omap3-c64iva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+Jl3_main_1l3_main_2l3_main_3DD E:  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 Qaplaia0+$JJ0J1J2segment@0 simple-bus+J`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ Qrevsysc[ 0fck+ J@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`Qrev+ J` prm@0ti,omap4-prmsimple-bus  : + J clocks+sys_clkin_ck@110i ti,mux-clock vabe_dpll_bypass_clk_mux_ck@108i ti,mux-clock3abe_dpll_refclk_mux_ck@10ci ti,mux-clock 2dbgclk_mux_ckifixed-factor-clockl4_wkup_clk_mux_ck@108i ti,mux-clocksyc_clk_div_ck@100iti,divider-clockusim_ck@1858iti,divider-clockXusim_fclk@1858iti,gate-clockXtrace_clk_div_ckiti,clkdm-gate-clock bandgap_fclk@1888iti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ Jclk@20 ti,clkctrl \iemu_sys_cm@1a00 ti,omap4-cm+ Jclk@20 ti,clkctrl iprm@400#ti,omap4-prm-instti,omap-prm-inst^prm@700#ti,omap4-prm-instti,omap-prm-instprm@f00#ti,omap4-prm-instti,omap-prm-instprm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,syscQrev+ Jscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310i ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310iti,composite-mux-clock auxclk0_src_ckiti,composite-clockauxclk0_ck@310iti,divider-clock*auxclk1_src_gate_ck@314i ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314iti,composite-mux-clock auxclk1_src_ckiti,composite-clockauxclk1_ck@314iti,divider-clock+auxclk2_src_gate_ck@318i ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318iti,composite-mux-clock auxclk2_src_ckiti,composite-clock auxclk2_ck@318iti,divider-clock ,auxclk3_src_gate_ck@31ci ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31citi,composite-mux-clock "auxclk3_src_ckiti,composite-clock!"#auxclk3_ck@31citi,divider-clock#-auxclk4_src_gate_ck@320i ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320iti,composite-mux-clock  %auxclk4_src_ckiti,composite-clock$%&auxclk4_ck@320iti,divider-clock& .auxclk5_src_gate_ck@324i ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324iti,composite-mux-clock $(auxclk5_src_ckiti,composite-clock'()auxclk5_ck@324iti,divider-clock)$/auxclkreq0_ck@210i ti,mux-clock*+,-./auxclkreq1_ck@214i ti,mux-clock*+,-./auxclkreq2_ck@218i ti,mux-clock*+,-./auxclkreq3_ck@21ci ti,mux-clock*+,-./auxclkreq4_ck@220i ti,mux-clock*+,-./ auxclkreq5_ck@224i ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup Qrevsysc[+ Jscm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+xJ@@PPtarget-module@0ti,sysc-omap2ti,syscQrevsyscsyss[ fckdbclk+ Jgpio@0ti,omap4-gpio :target-module@4000ti,sysc-omap2ti,sysc@@@Qrevsyscsyss"[ fck+ J@wdt@0ti,omap4-wdtti,omap3-wdt :Ptarget-module@8000ti,sysc-omap2-timerti,syscQrevsyscsyss' [  fck+ J/timer@0ti,omap3430-timer  fck :%: I Ytarget-module@c000ti,sysc-omap2ti,syscQrevsyscsyss' [ Xfck+ Jkeypad@0ti,omap4-keypad :xQmputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup Qrevsysc[+ Jpinmux@40 ti,omap4-padconfpinctrl-single@8+ppinmux_twl6030_wkup_pinspsegment@20000 simple-bus+J``  00@@PPpptarget-module@0ti,sysc disabled+ Jtarget-module@2000ti,sysc disabled+ J target-module@4000ti,sysc disabled+ J@target-module@6000ti,sysc disabled+0J`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ Qaplaia0+TJJJJJ J (J(0J0segment@0 simple-bus+J 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   Qrevsysc[+ J scm@0ti,omap4-scm-coresimple-bus+ Jscm_conf@0syscon+control-phy@300ti,control-phy-usb2Qpoweracontrol-phy@33cti,control-phy-otghs<Qotghs_control`target-module@4000ti,sysc-omap4ti,sysc@Qrev+ J@cm1@0ti,omap4-cm1simple-bus + J clocks+extalt_clkin_cki fixed-clockDpad_clks_src_cki fixed-clock0pad_clks_ck@108iti,gate-clock0pad_slimbus_core_clks_cki fixed-clocksecure_32k_clk_src_cki fixed-clockslimbus_src_clki fixed-clock1slimbus_clk@108iti,gate-clock1 sys_32k_cki fixed-clockvirt_12000000_cki fixed-clockvirt_13000000_cki fixed-clock]@ virt_16800000_cki fixed-clockY virt_19200000_cki fixed-clock$ virt_26000000_cki fixed-clock virt_27000000_cki fixed-clock virt_38400000_cki fixed-clockItie_low_clock_cki fixed-clockutmi_phy_clkout_cki fixed-clockxclk60mhsp1_cki fixed-clockZxclk60mhsp2_cki fixed-clock[xclk60motg_cki fixed-clockdpll_abe_ck@1e0iti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0iti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0iti,divider-clock5v6abe_24m_fclkifixed-factor-clock6abe_clk@108iti,divider-clock6dpll_abe_m3x2_ck@1f4iti,divider-clock5v7core_hsd_byp_clk_mux_ck@12ci ti,mux-clock7,8dpll_core_ck@120iti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ckiti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140iti,divider-clock:@vdpll_core_m2_ck@130iti,divider-clock90v;ddrphy_ckifixed-factor-clock;dpll_core_m5x2_ck@13citi,divider-clock:<v<div_core_ck@100iti,divider-clock<Gdiv_iva_hs_clk@1dciti,divider-clock<@div_mpu_hs_clk@19citi,divider-clock<Fdpll_core_m4x2_ck@138iti,divider-clock:8v=dll_clk_div_ckifixed-factor-clock=dpll_abe_m2_ck@1f0iti,divider-clock4vJdpll_core_m3x2_gate_ck@134i ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134iti,composite-divider-clock:4v?dpll_core_m3x2_ckiti,composite-clock>?dpll_core_m7x2_ck@144iti,divider-clock:Dviva_hsd_byp_clk_mux_ck@1aci ti,mux-clock@Adpll_iva_ck@1a0iti,omap4-dpll-clockAIB$7Bdpll_iva_x2_ckiti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8iti,divider-clockCvID$~Ddpll_iva_m5x2_ck@1bciti,divider-clockCvIE$] Edpll_mpu_ck@160iti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170iti,divider-clockpvper_hs_clk_div_ckifixed-factor-clock7Kusb_hs_clk_div_ckifixed-factor-clock7Ql3_div_ck@100iti,divider-clockGHl4_div_ck@100iti,divider-clockHlp_clk_div_ckifixed-factor-clock6mpu_periphclkifixed-factor-clockocp_abe_iclk@528iti,divider-clock I(per_abe_24m_fclkifixed-factor-clockJdummy_cki fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ Jclk@20 ti,clkctrl itesla_cm@400 ti,omap4-cm+ Jclk@20 ti,clkctrl i]abe_cm@500 ti,omap4-cm+ Jclk@20 ti,clkctrl liItarget-module@8000ti,sysc-omap4ti,syscQrev+ J cm2@0ti,omap4-cm2simple-bus + J clocks+per_hsd_byp_clk_mux_ck@14ci ti,mux-clockKLLdpll_per_ck@140iti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150iti,divider-clockMPvUdpll_per_x2_ck@150iti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150iti,divider-clockNPvTdpll_per_m3x2_gate_ck@154i ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154iti,composite-divider-clockNTvPdpll_per_m3x2_ckiti,composite-clockOPdpll_per_m4x2_ck@158iti,divider-clockNXvdpll_per_m5x2_ck@15citi,divider-clockN\vdpll_per_m6x2_ck@160iti,divider-clockN`vSdpll_per_m7x2_ck@164iti,divider-clockNdvdpll_usb_ck@180iti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4iti,fixed-factor-clockR9Fdpll_usb_m2_ck@190iti,divider-clockRvVducati_clk_mux_ck@100i ti,mux-clockGSfunc_12m_fclkifixed-factor-clockTfunc_24m_clkifixed-factor-clockUfunc_24mc_fclkifixed-factor-clockTfunc_48m_fclk@108iti,divider-clockTfunc_48mc_fclkifixed-factor-clockTfunc_64m_fclk@108iti,divider-clockfunc_96m_fclk@108iti,divider-clockTinit_60m_fclk@104iti,divider-clockVYper_abe_nc_fclk@108iti,divider-clockJsha2md5_fck@15c8iti,gate-clockHusb_phy_cm_clk32k@640iti,gate-clock@bclockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ Jclk@20 ti,clkctrl idl3_1_cm@700 ti,omap4-cm+ Jclk@20 ti,clkctrl il3_2_cm@800 ti,omap4-cm+ Jclk@20 ti,clkctrl iducati_cm@900 ti,omap4-cm + J clk@20 ti,clkctrl il3_dma_cm@a00 ti,omap4-cm + J clk@20 ti,clkctrl iWl3_emif_cm@b00 ti,omap4-cm + J clk@20 ti,clkctrl id2d_cm@c00 ti,omap4-cm + J clk@20 ti,clkctrl icl4_cfg_cm@d00 ti,omap4-cm + J clk@20 ti,clkctrl iel3_instr_cm@e00 ti,omap4-cm+ Jclk@20 ti,clkctrl $iivahd_cm@f00 ti,omap4-cm+ Jclk@20 ti,clkctrl iiss_cm@1000 ti,omap4-cm+ Jclk@20 ti,clkctrl ijl3_dss_cm@1100 ti,omap4-cm+ Jclk@20 ti,clkctrl il3_gfx_cm@1200 ti,omap4-cm+ Jclk@20 ti,clkctrl il3_init_cm@1300 ti,omap4-cm+ Jclk@20 ti,clkctrl iXl4_per_cm@1400 ti,omap4-cm+ Jclock@20ti,clkctrl-l4-perti,clkctrl Dikclock@1a0 ti,clkctrl-l4-secureti,clkctrl<ivtarget-module@56000ti,sysc-omap2ti,sysc``,`(Qrevsyscsyss# T [ Wfck+ J`dma-controller@0ti,omap4430-sdmati,omap-sdma0:  bm zwtarget-module@58000ti,sysc-omap2ti,syscQrevsyscsyss#T[ Xfck+ JPhsi@0 ti,omap4-hsi@PQsysgdd Xhsi_fck :Ggdd_mpu+ J@hsi-port@2000ti,omap4-hsi-port (Qtxrx :Chsi-port@3000ti,omap4-hsi-port08Qtxrx :Dtarget-module@5e000ti,sysc disabled+ J target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   Qrevsyscsyss [ XHfck+ J usbhstll@0 ti,usbhs-tll :Ntarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@@QrevsyscsyssT[ X8fck+ J@usbhshost@0ti,usbhs-host+ J YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-phyohci@800ti,ohci-omap3 :Lehci@c00 ti,ehci-omap  :M\target-module@66000ti,sysc-omap2ti,sysc```Qrevsyscsyss [ ]fck^rstctrl+ J`mmu@0ti,omap4-iommu :segment@80000 simple-bus+J      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ Jtarget-module@2b000ti,sysc-omap2ti,syscQrevsyscsyss T[ X@fck+ Jusb_otg_hs@0ti,omap4-musb:\]mcdma__ usb2-phy  `(2target-module@2d000ti,sysc-omap2ti,syscQrevsyscsyss [ Xfck+ Jocp2scp@0ti,omap-ocp2scp+ Jusb2phy@80 ti,omap-usb2X abwkupclk._target-module@36000ti,sysc-omap2ti,sysc```Qrevsyscsyss[ cfck+ J`target-module@4d000ti,sysc-omap2ti,syscQrevsyscsyss[ cfck+ Jtarget-module@59000ti,sysc-omap4-srti,sysc8Qsysc[ dfck+ Jsmartreflex@0ti,omap4-smartreflex-mpu :target-module@5b000ti,sysc-omap4-srti,sysc8Qsysc[ dfck+ Jsmartreflex@0ti,omap4-smartreflex-iva :ftarget-module@5d000ti,sysc-omap4-srti,sysc8Qsysc[ dfck+ Jsmartreflex@0ti,omap4-smartreflex-core :target-module@60000ti,sysc disabled+ Jtarget-module@74000ti,sysc-omap4ti,sysc@@ Qrevsysc [ efck+ J@mailbox@0ti,omap4-mailbox :9EWmbox_ipu i tmbox_dsp i ttarget-module@76000ti,sysc-omap2ti,sysc```Qrevsyscsyss [ efck+ J`spinlock@0ti,omap4-hwspinlocksegment@100000 simple-bus+`J  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core Qrevsysc[+ Jpinmux@40 ti,omap4-padconfpinctrl-single@+pdefault fghlpinmux_mcpdm_pins(pinmux_twl6040_pins&`pinmux_mcbsp1_pins ~pinmux_hsusbb1_pins`           pinmux_hsusb1phy_pinsLpinmux_w2cbw0015_pins&:pinmux_i2c1_pinsnpinmux_i2c4_pins}pinmux_mmc1_pins0ypinmux_mmc5_pins0  {pinmux_twl6030_pins^Aopinmux_led_pinsfpinmux_button_pinsgpinmux_i2c2_pinsupinmux_i2c3_pinsmpinmux_smsc_pins(*0hpinmux_dss_hdmi_pins XZ\^omap4_padconf_global@5a0sysconsimple-busp+ Jpipbias_regulator@60ti,pbias-omap4ti,pbias-omap`ipbias_mmc_omap4pbias_mmc_omap4w@-xtarget-module@2000ti,sysc disabled+ J target-module@8000ti,sysc disabled+ Jtarget-module@a000ti,sysc-omap4ti,sysc Qrevsysc T [ jfck+ Jsegment@180000 simple-bus+segment@200000 simple-bus+hJ!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ J@target-module@6000ti,sysc disabled+ J`target-module@a000ti,sysc disabled+ Jtarget-module@c000ti,sysc disabled+ Jtarget-module@10000ti,sysc disabled+ Jtarget-module@12000ti,sysc disabled+ J target-module@14000ti,sysc disabled+ J@target-module@16000ti,sysc disabled+ J`target-module@18000ti,sysc disabled+ Jtarget-module@1c000ti,sysc disabled+ Jtarget-module@1e000ti,sysc disabled+ Jtarget-module@20000ti,sysc disabled+ Jtarget-module@26000ti,sysc disabled+ J`target-module@28000ti,sysc disabled+ Jtarget-module@2a000ti,sysc disabled+ Jsegment@280000 simple-bus+segment@300000 simple-bus+J042@@2@ `2`p2p2232 2@target-module@0ti,sysc disabled+xJ@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHHQaplaia0ia1ia2ia3+JH H segment@0 simple-bus+J  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXQrevsyscsyss[ k0fck+ Jserial@0ti,omap4-uart :JlJltarget-module@32000ti,sysc-omap2-timerti,sysc   Qrevsyscsyss' [ kfck+ J timer@0ti,omap3430-timer kfck :&target-module@34000ti,sysc-omap4-timerti,sysc@@ Qrevsysc[ k fck+ J@timer@0ti,omap4430-timer k fck :'target-module@36000ti,sysc-omap4-timerti,sysc`` Qrevsysc[ k(fck+ J`timer@0ti,omap4430-timer k(fck :(target-module@3e000ti,sysc-omap4-timerti,sysc Qrevsysc[ k0fck+ Jtimer@0ti,omap4430-timer k0fck :-target-module@40000ti,sysc disabled+ Jtarget-module@55000ti,sysc-omap2ti,syscPPQQrevsyscsyss[k@k@ fckdbclk+ JPgpio@0ti,omap4-gpio :target-module@57000ti,sysc-omap2ti,syscppqQrevsyscsyss[kHkH fckdbclk+ Jpgpio@0ti,omap4-gpio :target-module@59000ti,sysc-omap2ti,syscQrevsyscsyss[kPkP fckdbclk+ Jgpio@0ti,omap4-gpio : target-module@5b000ti,sysc-omap2ti,syscQrevsyscsyss[kXkX fckdbclk+ Jgpio@0ti,omap4-gpio :!target-module@5d000ti,sysc-omap2ti,syscQrevsyscsyss[k`k` fckdbclk+ Jgpio@0ti,omap4-gpio :"rtarget-module@60000ti,sysc-omap2ti,syscQrevsyscsyss[ kfck+ Ji2c@0 ti,omap4-i2c :=+defaultmeeprom@51 atmel,24c01Qtarget-module@6a000ti,sysc-omap2ti,syscPTXQrevsyscsyss[ k fck+ Jserial@0ti,omap4-uart :Hltarget-module@6c000ti,sysc-omap2ti,syscPTXQrevsyscsyss[ k(fck+ Jserial@0ti,omap4-uart :Iltarget-module@6e000ti,sysc-omap2ti,syscPTXQrevsyscsyss[ k8fck+ Jserial@0ti,omap4-uart :Fltarget-module@70000ti,sysc-omap2ti,syscQrevsyscsyss[ kfck+ Ji2c@0 ti,omap4-i2c :8+defaultntwl@48H : ti,twl6030defaultoprtcti,twl4030-rtc: regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-zregulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusimO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio&regulator-vusbti,twl6030-vusbqregulator-v1v8ti,twl6030-v1v8&sregulator-v2v1ti,twl6030-v2v1&tusb-comparatorti,twl6030-usb: :qpwmti,twl6030-pwmEpwmledti,twl6030-pwmledEgpadcti,twl6030-gpadc:Ptwl@4b ti,twl6040iK :w brss~ttarget-module@72000ti,sysc-omap2ti,sysc   Qrevsyscsyss[ kfck+ J i2c@0 ti,omap4-i2c :9+defaultutarget-module@76000ti,sysc-omap4ti,sysc`` Qrevsysc[ kfck+ J`target-module@78000ti,sysc-omap2ti,syscQrevsyscsyss [ k8fck+ Jelm@0ti,am3352-elm  : disabledtarget-module@86000ti,sysc-omap2-timerti,sysc```Qrevsyscsyss' [ kfck+ J`timer@0ti,omap3430-timer kfck :.target-module@88000ti,sysc-omap4-timerti,sysc Qrevsysc[ kfck+ Jtimer@0ti,omap4430-timer kfck :/target-module@90000ti,sysc-omap2ti,sysc   Qrevsysc[ v fck+ J rng@0 ti,omap4-rng  :4target-module@96000ti,sysc-omap2ti,sysc `Qsysc [ kfck+ J `mcbsp@0ti,omap4-mcbspQmpu :commonww txrx disabledtarget-module@98000ti,sysc-omap4ti,sysc   Qrevsysc[ kfck+ J spi@0ti,omap4-mcspi :A+@w#w$w%w&w'w(w)w* tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   Qrevsysc[ kfck+ J spi@0ti,omap4-mcspi :B+ w+w,w-w.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   QrevsyscT[ Xfck+ J mmc@0ti,omap4-hsmmc :Sw=w>txrxxdefaultyztarget-module@9e000ti,sysc disabled+ J target-module@a2000ti,sysc disabled+ J target-module@a4000ti,sysc disabled+J @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8Qrevsyscsyss[ vfck+ J Pdes@0 ti,omap4-des :Rwuwttxrxtarget-module@a8000ti,sysc disabled+ J @target-module@ad000ti,sysc-omap4ti,sysc   QrevsyscT[ kfck+ J mmc@0ti,omap4-hsmmc :^wMwNtxrx disabledtarget-module@b0000ti,sysc disabled+ J target-module@b2000ti,sysc-omap2ti,sysc   Qrevsyscsyss khfck+ J 1w@0 ti,omap3-1w ::target-module@b4000ti,sysc-omap4ti,sysc @ @ QrevsyscT[ Xfck+ J @mmc@0ti,omap4-hsmmc :Vw/w0txrx disabledtarget-module@b8000ti,sysc-omap4ti,sysc   Qrevsysc[ kfck+ J spi@0ti,omap4-mcspi :[+wwtx0rx0target-module@ba000ti,sysc-omap4ti,sysc   Qrevsysc[ kfck+ J spi@0ti,omap4-mcspi :0+wFwGtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   QrevsyscT[ kfck+ J mmc@0ti,omap4-hsmmc :`w9w:txrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P QrevsyscT[ k@fck+ J Pmmc@0ti,omap4-hsmmc :;w;w<txrxdefault{|$7segment@200000 simple-bus+J55target-module@150000ti,sysc-omap2ti,syscQrevsyscsyss[ kfck+ Ji2c@0 ti,omap4-i2c :>+default}interconnect@40100000ti,omap4-l4-abesimple-bus@@Qlaap+J@IIsegment@0 simple-bus+0J  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc Qsysc [ I(fck+J I I mcbsp@0ti,omap4-mcbspI Qmpudma :commonw!w"txrxokaydefault~target-module@24000ti,sysc-omap2ti,sysc@Qsysc [ I0fck+J@I@I@mcbsp@0ti,omap4-mcbspI@Qmpudma :commonwwtxrx disabledtarget-module@26000ti,sysc-omap2ti,sysc`Qsysc [ I8fck+J`I`I`mcbsp@0ti,omap4-mcbspI`Qmpudma :commonwwtxrx disabledtarget-module@28000ti,sysc-mcaspti,sysc Qrevsysc[ I fck+JIItarget-module@2a000ti,sysc disabled+JIItarget-module@2e000ti,sysc-omap4ti,sysc Qrevsysc[ Ifck+JIIdmic@0ti,omap4-dmicIQmpudma :rwCup_link disabledtarget-module@30000ti,sysc-omap2ti,syscQrevsyscsyss"[ Ihfck+JIIwdt@0ti,omap4-wdtti,omap3-wdt :Ptarget-module@32000ti,sysc-omap4ti,sysc   Qrevsysc[ Ifck+J I I okaydefaultmcpdm@0ti,omap4-mcpdmI Qmpudma :pwAwBup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysc Qrevsysc[ IHfck+JIItimer@0ti,omap4430-timerI IHfck :)Mtarget-module@3a000ti,sysc-omap4-timerti,sysc Qrevsysc[ IPfck+JIItimer@0ti,omap4430-timerI IPfck :*Mtarget-module@3c000ti,sysc-omap4-timerti,sysc Qrevsysc[ IXfck+JIItimer@0ti,omap4430-timerI IXfck :+Mtarget-module@3e000ti,sysc-omap4-timerti,sysc Qrevsysc[ I`fck+JIItimer@0ti,omap4430-timerI I`fck :,Mtarget-module@80000ti,sysc disabled+JIItarget-module@a0000ti,sysc disabled+J I I target-module@c0000ti,sysc disabled+J I I target-module@f1000ti,sysc-omap4ti,sysc QrevsyscT [ Ifck+JIIsram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ :wrxtxZfgpmcxHfckJ,ethernet@gpmcsmsc,lan9221smsc,lan9115 22 0 CQ2`n2}222##(#@2Rbp}  : miiN target-module@52000000ti,sysc-omap4ti,syscissRR QrevsyscT[ jfck+ JRtarget-module@55082000ti,sysc-omap2ti,syscU U U Qrevsyscsyss [ fckrstctrl JU +mmu@0ti,omap4-iommu :dtarget-module@4012c000ti,sysc-omap4ti,sysc@@ Qrevsysc[ I@fck+J@IIdmm@4e000000 ti,omap4-dmmN :qdmmemif@4c000000 ti,emif-4dL :nemif1x  )emif@4d000000 ti,emif-4dM :oemif2x  )target-module@4b501000ti,sysc-omap2ti,syscKPKPKPQrevsyscsyss[ vfck+ JKPaes@0 ti,omap4-aes :Uwowntxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKpQrevsyscsyss[ vfck+ JKpaes@0 ti,omap4-aes :@wrwqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKQrevsyscsyss [ v(fck+ JKsham@0ti,omap4-sham :3wwrxregulator-abb-mpu ti,abb-v2abb_mpu+ < U2 fokayJ0{J0`Qbase-addressint-addressx vO1regulator-abb-iva ti,abb-v2abb_iva+ < U2 f disabledJ0{J0`Qbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV QrevsyscT[ fck+ JVtarget-module@58000000ti,sysc-omap2ti,syscXX Qrevsyss0 fckhdmi_clksys_clktv_clk+ JXdss@0 ti,omap4-dssok fck+ Jtarget-module@1000ti,sysc-omap2ti,syscQrevsyscsyss [ T  fcksys_clk+ Jdispc@0ti,omap4-dispc : fcktarget-module@2000ti,sysc-omap2ti,sysc   Qrevsyscsyss [  fcksys_clk+ J encoder@0 disabledHfckicktarget-module@3000ti,sysc-omap2ti,sysc0Qrev sys_clk+ J0encoder@0ti,omap4-venc disabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@Qrevsyscsyss [+ J@encoder@0 ti,omap4-dsi@ Qprotophypll :5 disabled  fcksys_clktarget-module@5000ti,sysc-omap2ti,syscPPPQrevsyscsyss [+ JPencoder@0 ti,omap4-dsi@ Qprotophypll :T disabled  fcksys_clktarget-module@6000ti,sysc-omap4ti,sysc`` Qrevsysc[  fckdss_clk+ J` encoder@0ti,omap4-hdmi Qwppllphycore :eok  fcksys_clkwL audio_tx defaultportendpoint bandgap@4a002260J"`J#,ti,omap4430-bandgap thermal-zonescpu_thermal    N tripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0  memory@80000000memory@soundti,abe-twl6040 DuoVero )I 6 ?a JHeadset StereophoneHSOLHeadset StereophoneHSORHSMICHeadset MicHeadset MicHeadset Mic Biashsusb1_phyusb-nop-xceiv [.default- main_clk$\w2cbw0015_vmmcdefaultregulator-fixed w2cbw0015-- n  gp x|leds gpio-ledsled0 duovero:blue:led0 a heartbeatgpio_keys gpio-keys+button0 button0  a  connectorhdmi-connector hdmid portendpoint regulator-vddvarioregulator-fixed vddvario&regulator-vdd33aregulator-fixedvdd33a& compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3serial0serial1serial2serial3display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parents#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysresetsreset-names#iommu-cellsusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmpagesizeregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyti,bus-widthti,non-removablecap-power-off-cardkeep-power-in-suspendti,timer-dspgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressphy-modegpmc,mux-add-datagpmc,sync-readgpmc,sync-writegpmc,sync-clk-psti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdda-supplyremote-endpoint#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosstartup-delay-usregulator-boot-onlabellinux,default-triggerlinux,codedebounce-intervalwakeup-sourcehpd-gpios