f8(zBTicino i.MX6DL Mamoj board !bticino,imx6dl-mamojfsl,imx6dlchosenaliases",/soc/bus@2100000/ethernet@2188000!6/soc/bus@2000000/flexcan@2090000!;/soc/bus@2000000/flexcan@2094000@/soc/bus@2000000/gpio@209c000F/soc/bus@2000000/gpio@20a0000L/soc/bus@2000000/gpio@20a4000R/soc/bus@2000000/gpio@20a8000X/soc/bus@2000000/gpio@20ac000^/soc/bus@2000000/gpio@20b0000d/soc/bus@2000000/gpio@20b4000j/soc/bus@2100000/i2c@21a0000o/soc/bus@2100000/i2c@21a4000t/soc/bus@2100000/i2c@21a8000y/soc/ipu@2400000~/soc/bus@2100000/usdhc@2190000/soc/bus@2100000/usdhc@2194000/soc/bus@2100000/usdhc@2198000/soc/bus@2100000/usdhc@219c0001/soc/bus@2000000/spba-bus@2000000/serial@2020000 /soc/bus@2100000/serial@21e8000 /soc/bus@2100000/serial@21ec000 /soc/bus@2100000/serial@21f0000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000 /soc/bus@2000000/usbphy@20c9000 /soc/bus@2000000/usbphy@20ca000/soc/bus@2100000/i2c@21f8000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6tempmon!fsl,imx6q-tempmon 1(4calibtemp_gradeELldb!fsl,imx6q-ldbfsl,imx53-ldbb fdisabled0E!"'((mdi0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0y fdisabledport@0yendpoint}?port@1yendpoint}Clvds-channel@1y fdisabledport@0yendpoint} @port@1yendpoint} Dpmu!arm,cortex-a9-pmu ^usbphynop1!usb-nop-xceiv&usbphynop2!usb-nop-xceiv'soc !simple-busdma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbhy 0    gpmi0gpmi1gpmi2gpmi3Ej gpmi-nand@112000!fsl,imx6q-gpmi-nandy @ gpmi-nandbch bch(E0mgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bch rx-tx fdisabledhdmi@120000y sbE{| miahbisfr fdisabled!fsl,imx6dl-hdmiport@0yendpoint} =port@1yendpoint} Agpu@130000 !vivante,gcy@  EzJmbuscoreshadergpu@134000 !vivante,gcy@@  Ey mbuscoretimer@a00600!arm,cortex-a9-twd-timery   Einterrupt-controller@a01000!arm,cortex-a9-gicyl2-cache@a02000!arm,pl310-cachey  \+9 E UfEpcie@1ffc000!fsl,imx6q-pciesnps,dw-pciey@ dbiconfigzpci0 xmsi{zyxEmpciepcie_buspcie_phy fdisabledbus@2000000!fsl,aips-bussimple-busyspba-bus@2000000!fsl,spba-bussimple-busyspdif@2004000!fsl,imx35-spdify@@ 4 rxtxPEkv>:mcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba fdisabledspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspiy@ Eppmipgper rxtx fdisabledspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspiy@  Eqqmipgper rxtx fdisabledspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspiy@ !Errmipgper rxtx fdisabledspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspiy@@ "Essmipgper   rxtx fdisabledserial@2020000!fsl,imx6q-uartfsl,imx21-uarty@ Emipgper rxtx fdisabledesai@2024000!fsl,imx35-esaiy@@ 3(Evmcorememextalfsysspba rxtx fdisabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssiy@ .E mipgbaud %&rxtx fdisabledssi@202c000!fsl,imx6q-ssifsl,imx51-ssiy@ /E mipgbaud )*rxtx fdisabledssi@2030000!fsl,imx6q-ssifsl,imx51-ssiy@ 0E mipgbaud -.rxtx fdisabledasrc@2034000!fsl,imx53-asrcy@@ 2Ekmmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxcfokayspba@203c000y@vpu@2040000!fsl,imx6dl-vpucnm,coda960y  bitjpegEmperahb aipstz@207c000y@pwm@2080000!fsl,imx6q-pwmfsl,imx27-pwmy@ SE>mipgper fdisabledpwm@2084000!fsl,imx6q-pwmfsl,imx27-pwmy@@ TE>mipgper fdisabledpwm@2088000!fsl,imx6q-pwmfsl,imx27-pwmy@ UE>mipgperfokaydefault*Mpwm@208c000!fsl,imx6q-pwmfsl,imx27-pwmy@ VE>mipgper fdisabledflexcan@2090000!fsl,imx6q-flexcany @ nElmmipgper44 fdisabledflexcan@2094000!fsl,imx6q-flexcany @@ oEnomipgper44 fdisabledtimer@2098000!fsl,imx6dl-gpty @ 7Ewxmipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpioy @BCBR@^   {y~zgpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpioy @DEBR^JIHGFEDOvuqWgpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpioy @@FGBR@^ai cQUgpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpioy @HIBR^     '8=.Zgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpioy @JKBR^xML/ 9%$#&gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioy @LMBR ^K   N+gpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioy @@NOBR^   keypad@20b8000!fsl,imx6q-kppfsl,imx21-kppy @ RE> fdisabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdty @ PE>watchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdty @ QE> fdisabledclock-controller@20c4000!fsl,imx6q-ccmy @@WXanatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfdy $16regulator-1p1!fsl,anatop-regulatorjvdd1p1yB@O 52regulator-3p0!fsl,anatop-regulatorjvdd3p0y*0  ( 3@2regulator-2p5!fsl,anatop-regulatorjvdd2p5y"U)00 +x2regulator-vddcore!fsl,anatop-regulatorjvddarmy  @Dp\s  Fregulator-vddpu!fsl,anatop-regulatorjvddpuy  @ Dp\s  regulator-vddsoc!fsl,anatop-regulatorjvddsocy  @Dp\s  Gusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyy  ,E"usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyy  -E$snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdy @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4snvs-poweroff!syscon-poweroff8`` fdisabledsnvs-powerkey!fsl,sec-v4.0-pwrkey t fdisabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000y @ 8epit@20d4000y @@ 9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-srcy @[`gpc@20dc000!fsl,imx6q-gpcy @YZE>mipgpgcpower-domain@0ypower-domain@1y0EzJyiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdy8mux-controller !mmio-mux8448 (( ipu1_csi0_mux !video-mux)port@0yendpoint}.port@1yendpoint}0port@2yendpoint}2port@3yendpoint}4port@4yendpointport@5yendpoint}:ipu1_csi1_mux !video-mux)port@0yendpoint}/port@1yendpoint}1port@2yendpoint}3port@3yendpoint} 5port@4yendpointport@5yendpoint}!;pinctrl@20e0000!fsl,imx6dl-iomuxcy@enetgrp6`HX@ L4 D,$(P8\D(i2c3grp06(x@4|@-i2c4grp068@< @9pinctrlipu1lcdif6   Nipu1lcdifpwrgrp6X@0XT<@P@0X@0X@0XT<@0XhP@0Xt@0XSpwm3grp6D,uart3grp06d4h8 8usbhostgrp6,@^usdhc1grp6pi (ypipipipi)usdhc3grp6pY  4YpYpYpY pY$ pY(pY,pY0pY,wlangrp6@_dcic@20e4000y@@ |dcic@20e8000y@ }sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdmay@ E>mipgahb?imx/sdma/sdma-imx6q.binpxp@20f0000y@ bepdc@20f4000y@@ abus@2100000!fsl,aips-bussimple-busycrypto@2100000 !fsl,sec-v4.0y  Emmemaclkipgemi_slowjr@1000!fsl,sec-v4.0-job-ringy ijr@2000!fsl,sec-v4.0-job-ringy  jaipstz@217c000y@usb@2184000!fsl,imx6q-usbfsl,imx27-usby@ +EX"c#ofokay peripheralusb@2184200!fsl,imx6q-usbfsl,imx27-usbyB (EX$c#hostofokay%usb@2184400!fsl,imx6q-usbfsl,imx27-usbyD )EX&hsicc#hosto fdisabledusb@2184600!fsl,imx6q-usbfsl,imx27-usbyF *EX'hsicc#hosto fdisabledusbmisc@2184800!fsl,imx6q-usbmiscyHE#ethernet@2188000!fsl,imx6q-fecy@ int0ppsvwEuu mipgahbptp 44fokaydefault*(miimlb@218c000y@$5u~usdhc@2190000!fsl,imx6q-usdhcy@ E mipgahbperfokaydefault*)*1}x@wlcore@2 !ti,wl1837y+?usdhc@2194000!fsl,imx6q-usdhcy@@ E mipgahbper fdisabledusdhc@2198000!fsl,imx6q-usdhcy@ E mipgahbperfokaydefault*,usdhc@219c000!fsl,imx6q-usdhcy@ E mipgahbper fdisabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2cy@ $E} fdisabledi2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2cy@@ %E~ fdisabledi2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2cy@ &Efokaydefault*-romcp@21ac000y@memory-controller@21b0000!fsl,imx6q-mmdcy@Ememory-controller@21b4000!fsl,imx6q-mmdcy@@ fdisabledweim@21b8000!fsl,imx6q-weimy@ ET fdisabledocotp-ctrl@21bc000!fsl,imx6q-ocotpsyscony@Espeed-grade@10yHcalib@38y8temp-grade@20y tzasc@21d0000y@ ltzasc@21d4000y@@ maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxy@ fdisabledmipi@21dc000!fsl,imx6-mipi-csi2y@deEa mdphyrefpix fdisabledport@1yendpoint@0y}.endpoint@1y}/port@2yendpoint@0y}0endpoint@1y}1port@3yendpoint@0y}2endpoint@1y}3port@4yendpoint@0y}4endpoint@1y}5 mipi@21e0000y@ fdisabledportsport@0yendpoint}6>port@1yendpoint}7Bvdoa@21e4000!fsl,imx6q-vdoay@@ Eserial@21e8000!fsl,imx6q-uartfsl,imx21-uarty@ Emipgper rxtx fdisabledserial@21ec000!fsl,imx6q-uartfsl,imx21-uarty@ Emipgper rxtxfokaydefault*8serial@21f0000!fsl,imx6q-uartfsl,imx21-uarty@ Emipgper  rxtx fdisabledserial@21f4000!fsl,imx6q-uartfsl,imx21-uarty@@ Emipgper !"rxtx fdisabledi2c@21f8000!fsl,imx6q-i2cfsl,imx21-i2cy@ #Etfokaydefault*9pmic@8 !fsl,pfuze100yregulatorssw1aby8dvjsw1cy8dvjsw2y 52Zdsw3ay"dsw3by"dsw4y 52ZswbstyLK@N0vsnvsyB@-dvrefddrdvgen1y 5vgen2y 5vgen3yw@2Zvgen4yw@2Zvgen5yw@2Zvgen6yw@2Zipu@2400000!fsl,imx6q-ipuy@@E mbusdi0di1port@0yIendpoint}:port@1yJendpoint};!port@2yKendpoint@0y}<Oendpoint@1y}= endpoint@2y}>6endpoint@3y}?endpoint@4y}@ port@3yLendpoint@0yendpoint@1y}A endpoint@2y}B7endpoint@3y}Cendpoint@4y}D sram@900000 !mmio-sramyEcpuscpu@0!arm,cortex-a9zcpuyE2  02  l(Eh)marmpll2_pfd2_396msteppll1_swpll1_sysFG(H 4speed_gradecpu@1!arm,cortex-a9zcpuyE2  02  l(Eh)marmpll2_pfd2_396msteppll1_swpll1_sysFGcapture-subsystem!fsl,imx-capture-subsystemIJdisplay-subsystem!fsl,imx-display-subsystemKLmemory@10000000zmemoryybacklight-lcd!pwm-backlight Ma, @Qdisp0!fsl,imx-parallel-display*rgb24default*Nfokayport@0yendpoint}O<port@1yendpoint}PTpanel-lcd!rocktech,rk070er9427<QRdefault*Sportendpoint}TPregulator-lcd-dvdd!regulator-fixed jlcd-dvddy2Z2Z FUK^RVregulator-lcd-power!regulator-fixed jlcd-enabley2Z2Z FUKoVXregulator-lcd-vgl!regulator-fixedjlcd-vgly2Z2Z FW^pKoX]regulator-lcd-vgh!regulator-fixedjlcd-vghy2Z2Z FU^pKoY[regulator-lcd-vcom!regulator-fixed jlcd-vcomy2Z2Z FZ^*Ko[\regulator-lcd-lr!regulator-fixedjlcd-lry2Z2Z FZKo\Rregulator-lcd-avdd!regulator-fixed jlcd-avddy@@ FW ^pKo]Yregulator-usb-vbus!regulator-fixed jusbhost-vbusdefault*^y F+K%regulator-wl18xx-vmcc!regulator-fixedjvwl1807default*_yw@w@ F+^pK* #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonnvmem-cellsnvmem-cell-namesclocks#thermal-sensor-cellsgprstatusclock-namesregremote-endpointphandle#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-map#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellspinctrl-namespinctrl-0fsl,stop-modegpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dworddr_modevbus-supplyphy_type#index-cellsphy-modebus-widthvmmc-supplyno-1-8-vnon-removablekeep-power-in-suspendcap-power-off-cardmax-frequencytcxo-clock-frequencyfsl,weim-cs-gprregulator-boot-onregulator-ramp-delaynext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportspwmsbrightness-levelsdefault-brightness-levelinterface-pix-fmtbacklightgpioenable-active-highstartup-delay-usvin-supply