ka8d(dl,Microsoft Lumia 6402microsoft,dempseyqcom,msm8226=handsetchosenJ Qdisplay0framebuffer@32000002simple-framebuffer]  aa8r8g8b8hnu @0|]^_ikmclocksxo_board 2fixed-clock$sleep_clk 2fixed-clockcpuscpu@02arm,cortex-a7qcom,msm8226-smpcpu]|Scpu@12arm,cortex-a7qcom,msm8226-smpcpu]| Tcpu@22arm,cortex-a7qcom,msm8226-smpcpu]|  Ucpu@32arm,cortex-a7qcom,msm8226-smpcpu]|  Vl2-cache2cache"firmwarescm2qcom,scm-msm8226qcom,scm|0corebusifacememory@0memory]opp-table-cpu2operating-points-v2<opp-300000000Gopp-384000000G`opp-600000000G#Fopp-787200000G.pmu2arm,cortex-a7-pmu Nremoteproc$2qcom,msm8226-rpm-procqcom,rpm-procmaster-stats2qcom,rpm-master-statsYjAPSSMPSSLPSSPRONTOsmd-edge N|rpm-requests2qcom,rpm-msm8226qcom,smd-rpm rpm_requestsclock-controller2qcom,rpmcc-msm8226qcom,rpmcc|0xopower-controller2qcom,msm8226-rpmpdNopp-table2operating-points-v2opp1opp2opp3opp4opp5opp6regulators2qcom,rpm-pm8226-regulatorss1s3  s4w@ s500l3 q0l4OOl5OOl6w@w@l7::l8w@w@l9GGl10w@w@/l12w@w@l14)0)0l15+|+|%l16--l17-p-p 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0coreifaceokayserial@f9920000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm] Nn|kW 0coreiface disabledi2c@f99230002qcom,i2c-qup-v2.1.1]0 N_|YW 0coreifacedefault# disabledi2c@f99240002qcom,i2c-qup-v2.1.1]@ N`|[W 0coreifacedefault$okaymagnetometer@c2asahi-kasei,ak09911] 2%=accelerometer@1e2kionix,kx022-1020] H&?2%\i1000-10001i2c@f99250002qcom,i2c-qup-v2.1.1]P Na|]W 0coreifacedefault' disabledi2c@f99260002qcom,i2c-qup-v2.1.1]` Nb|_W 0coreifacedefault( disabledi2c@f99270002qcom,i2c-qup-v2.1.1]p Nc|aW 0coreifacedefault)okaytouchscreen@4b2syna,rmi4-i2c]K H&2%v*defaultrmi4-f01@1]rmi4-f11@11]i2c@f99280002qcom,i2c-qup-v2.1.1] Nd|cW 0coreiface+default disabledusb@f9a55000 2qcom,ci-hdrc]PR N|  0ifacecore xh coreulpi peripheral"usb-phy,,okay1>-.ulpiphy(2qcom,usb-hs-phy-msm8226qcom,usb-hs-phyE| 0refsleep .phyporPDh$>-^/j0,rng@f9bff000 2qcom,prng]|0coresram@fc1900002qcom,msm8226-rpm-stats]clock-controller@fc4000002qcom,gcc-msm8226]@@1| 0xosleep_clksram@fc4280002qcom,rpm-msg-ram]B@ JB@sram@150]Psram@b50] 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#address-cells#size-cellsinterrupt-parentmodelcompatiblechassis-typerangesstdout-pathregformatwidthheightstrideclockspower-domains#clock-cellsclock-frequencyphandleenable-methoddevice_typenext-level-cacheoperating-points-v2qcom,accqcom,saw#cooling-cellscache-levelcache-unifiedclock-namesopp-sharedopp-hzinterruptsqcom,rpm-msg-ramqcom,master-namesmboxesqcom,smd-edgeqcom,smd-channels#power-domain-cellsopp-levelregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-system-loadregulator-allow-set-loadno-mapmemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellsframe-numberstatusreg-namesinterrupt-namespinctrl-namespinctrl-0vmmc-supplyvqmmc-supplyvdd-supplyvid-supplyinterrupts-extendedvddio-supplymount-matrixvio-supplysyna,nosleep-modesyna,sensor-typeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modehnp-disablesrp-disableadp-disableahb-burst-configphy-namesphys#reset-cellsextcon#phy-cellsqcom,init-seqv1p8-supplyv3p3-supplynvmem-cellsnvmem-cell-names#qcom,sensors#thermal-sensor-cellsbitsqcom,eeqcom,channeldebouncebias-pull-uplinux,codeio-channelsio-channel-names#io-channel-cellsqcom,pre-scalinglabelgpio-controller#gpio-cellsgpio-ranges#hwlock-cellspinsfunctiondrive-strengthbias-disableoutput-highremote-endpointassigned-clock-parentspinctrl-1srampower-domain-namesqcom,smem-statesqcom,smem-state-namesoffsetmode-bootloadermode-normalmode-recoverypolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresismmc0mmc1display0gpios