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#address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3usb0usb1entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usphandledevice_typeregclock-frequencyclock-latencyclockscpu-idle-statesoperating-points-v2#cooling-cellsnvmem-cellsnvmem-cell-namesopp-sharedopp-hzopp-microvoltclock-latency-nsopp-supported-hw#clock-cellsclock-output-namesclock-names#phy-cellspower-domainsinterrupt-parentinterruptsinterrupt-affinityremote-endpointarm,cpu-registers-not-fw-configuredrangescpu#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangespinctrl-namespinctrl-0fsl,ext-reset-outputstatusfsl,input-selfsl,pins#mux-control-cellsmux-reg-masksmux-controlsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitfsl,tempmon#thermal-sensor-cellsregmapvaluemasklinux,keycodewakeup-sourceassigned-clocksassigned-clock-rates#reset-cells#power-domain-cellspower-supply#io-channel-cellsdma-namesdmas#pwm-cellsphy-supplyresetsdata-lanesassigned-clock-parentssamsung,burst-clock-frequencysamsung,esc-clock-frequencysamsung,pll-clock-frequencyuart-has-rtscts#sound-dai-cellsfsl,stop-moderegulator-boot-onregulator-always-onregulator-ramp-delayreset-gpiosDOVDD-supplyDVDD-supplyAVDD-supplyclock-laneslink-frequenciesVDDA-supplyVDDIO-supplyVDDD-supplyfsl,dte-mode#mbox-cellsfsl,mu-side-bfsl,usbphyfsl,usbmiscphy-clkgate-delay-usdr_modephy_type#index-cellsbus-widthfsl,tuning-stepfsl,tuning-start-tapkeep-power-in-suspendno-1-8-vnon-removablevmmc-supplypinctrl-1pinctrl-2reg-names#dma-cellsfsl,sdma-ram-script-nameinterrupt-namesfsl,num-tx-queuesfsl,num-rx-queuesdma-channelsautorepeatlabellinux,codeenable-active-highgpiostartup-delay-ussimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-dai